Datasheet

LMP90100

SNAS510P –JANUARY 2011–REVISED MARCH 2013

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FUNCTIONAL DESCRIPTION

Throughout this datasheet, the LMP90100/LMP90099/LMP90098/LMP90097 will be referred to as the

LMP90xxx.

The LMP90xxx is a low-power 24-Bit ΣΔ ADC with 4 fully differential / 7 single-ended analog channels for the

LMP90100/LMP90099 and 2 full differential / 4 single-ended for the LMP90098/LMP90097. Its serial data output

is two’s complement format. The output data rate (ODR) ranges from 1.6775 SPS to 214.65 SPS.

The serial communication for LMP90xxx is SPI, a synchronous serial interface that operates using 4 pins: chip

select bar (CSB), serial clock (SCLK), serial data in (SDI), and serial data out / data ready bar (SDO/DRYDYB).

True continuous built-in offset and gain background calibration is also available to improve measurement

accuracy. Unlike other ADCs, the LMP90xxx’s background calibration can run without heavily impacting the input

signal. This unique technique allows for positive as well as negative gain calibration and is available at all gain

settings.

The registers can be found in Registers, and a detailed description of the LMP90xxx are provided in the following

sections.

SIGNAL PATH

Reference Input (VREF)

The differential reference voltage VREF (VREFP – VREFN) sets the range for VIN.

The muxed VREF allows the user to choose between VREF1 or VREF2 for each channel. This selection can be

made by programming the VREF_SEL bit in the CHx_INPUTCN registers (CHx_INPUTCN: VREF_SEL). The

default mode is VREF1. If VREF2 is used, then VIN6 and VIN7 cannot be used as inputs because they share the

same pin.

Refer to VREF for VREF applications information.

Flexible Input MUX (VIN)

LMP90xxx provides a flexible input MUX as shown in Figure 35. The input that is digitized is VIN = VINP – VINN;

where VINP and VINN can be any availablie input.

The digitized input is also known as a channel, where CH = VIN = VINP – VINN. Thus, there are a maximum of 4

differential channels: CH0, CH1, CH2, and CH3 for the LMP90100/LMP90099. The LMP90098/LMP90097 has a

maximum of 2 differential channels: CH0 and CH1 because it does not have access to the VIN3, VIN4, and VIN5

pins.

LMP90xxx can also be configured single-endedly, where the common ground is any one of the inputs. There are

a maximum of 7 single-ended channels: CH0, CH1, CH2, CH3, CH4, CH5, and CH6 for the

LMP90100/LMP90099 and 4: CH0, CH1, CH2, CH3 for the LMP90098/LMP90097.

The input MUX can be programmed in the CHx_INPUTCN registers. For example on the LMP90100, to program

CH0 = VIN = VIN4 – VIN1, go to the CH0_INPUTCN register and set:

1. VINP = 0x4

2. VINN = 0x1

Product Folder Links: LMP90100