Datasheet

LMP90077, LMP90078, LMP90079, LMP90080
www.ti.com SNAS521F –JULY 2011–REVISED MARCH 2013
Table 13. ADC_DONE
ADC Data Available (Address 0x18)
Bit Bit Symbol Bit Description
Data Available – indicates if new conversion data is available
[7:0] DT_AVAIL_B 0x00 − 0xFE: Available
0xFF: Not available
Table 14. ADC_DOUT
(1)
16-bit Conversion Data (two’s complement) (Address 0x1A - 0x1B)
Address Name Register Description
0x1A ADC_DOUTH ADC Conversion Data [15:8]
0x1B ADC_DOUTL ADC Conversion Data [7:0]
0x1C Reserved Reserved
(1) Repeat reads of these registers are allowed as long as such reads are spaced apart by at least 72 µs.
CHANNEL CONFIGURATION REGISTERS
Table 15. CH_STS
Channel Status (Address 0x1E)
Bit Bit Symbol Bit Description
[7:2] Reserved -
Channel Scan Not Ready – indicates if it is okay to program CH_SCAN
1 CH_SCAN_NRDY 0: Update not pending, CH_SCAN register is okay to program
1: Update pending, CH_SCAN register is not ready to be programmed
Invalid or Repeated Read Status
0 INV_OR_RPT_RD_STS 0: ADC_DOUT just read was valid and hitherto unread
1: ADC_DOUT just read was either invalid (not ready) or there was a repeated read.
Table 16. CH_SCAN
(1)
Channel Scan Mode (Address 0x1F)
Bit Bit Symbol Bit Description
Channel Scan Select
0x0 (default): ScanMode0: Single-Channel Continuous Conversion
[7:6] CH_SCAN_SEL 0x1: ScanMode1: One or more channels Single Scan
0x2: ScanMode2: One or more channels Continuous Scan
0x3: ScanMode3: One or more channels Continuous Scan with Burnout Currents
Last channel for conversion
0x0: CH0
0x1: CH1
LAST_CH (CH4 to CH6 for
0x2: CH2
[5:3] LMP90080 and LMP90079
0x3: CH3
only)
0x4: CH4
0x5: CH5
0x6 (default): CH6
(2)
(1) While writing to the CH_SCAN register, if 0x7 is written to FIRST_CH or LAST_CH the write to the entire CH_SCAN register is ignored.
(2) LAST_CH cannot be smaller than FIRST_CH. For example, if LAST_CH = CH5, then FIRST_CH cannot be CH6. If 0x7 is written it is
ignored.
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