Datasheet

LMP900xx
SCLK
CSB
SDI
SDO
D6 = DRDYB
uC
SCLK
CSB
MOSI
MISO
Interrupt
CSB
SCLK
MSB
1 4 5 6 7 8 9 10 11 12 13 14 15 16 17
n
LSB
INST2
SDI
MSB
SDO/
DRDYB
Data Byte (s)
DRDYB is driving the pin
SDO is driving the pin
LSB
1/f
SCLK
t
CL
t
CH
...
LMP90077, LMP90078, LMP90079, LMP90080
SNAS521F –JULY 2011–REVISED MARCH 2013 www.ti.com
DrdybCase2: Combining SDO/DRDYB with SDO_DRDYB_DRIVER = 0x03
SDO/DRDYB can be made independent of CSB by setting SDO_DRDYB_DRIVER = 0x03 in the SPI Handshake
Control register. In this case, DRDYB will drive the pin unless the device is reading data, independent of the
state of CSB. SDO will drive the pin when CSB is asserted and the device is reading data.
With this scheme, one can use SDO/DRDYB as a true interrupt source, independent of the state of CSB. But this
scheme can only be used when the LMP900xx is the only device connected to the master's SPI bus because the
SDO/DRDYB pin will be DRDYB even when CSB is deasserted.
The timing protocol for this case can be seen in Figure 52. When drdyb asserts, assert CSB to start the SPI
transaction and begin writing the Instruction Bytes (INST1, UAB, INST2) to read from or write to registers.
Figure 52. Timing Protocol for DrdybCase2
DrdybCase3: Routing DRDYB to D6
Figure 53. DrdybCase3 Connection Diagram
The drdyb signal can be routed to pin D6 by setting SPI_DRDYB_D6 high and SDO_DRDYB_DRIVER to 0x4.
This is the behavior for DrdybCase3 as shown in Figure 53.
The timing protocol for this case can be seen in Figure 54. Since DRDYB is separated from SDO, it can be
monitored using the interrupt or polling method. If polled, the drdyb signal needs to be polled faster than t
DRDYB
to
detect a drdyb assertion. When drdyb asserts, assert CSB to start the SPI transaction and begin writing the
Instruction Bytes (INST1, UAB, INST2) to read from or write to registers.
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