Datasheet

SCALING
[CHx_SCAL_
SCALING]
System Calibrated
Code[15:0]
Scaled and Calibrated
ADC_DOUT
BITS SELECTOR
[CHx_SCAL_
BITS_SELECTOR]
X
[20:0]
LMP90077, LMP90078, LMP90079, LMP90080
SNAS521F –JULY 2011–REVISED MARCH 2013 www.ti.com
System Calibration Gain Coefficient Determination mode
1. Repeat the System Calibration Offset Coefficient Determination to calibrate the System offset for the
channel.
2. Apply the system reference-scale condition to the channel CH0/CH1/CH2/CH3.
3. In the CHx_SCAL_GAIN register, program the expected (desired) system-calibrated output code for this
condition in 16-bit unsigned format.
4. Enter the System Calibration Gain Coefficient Determination mode by programming 0x3 in the SCALCN
register.
5. LMP900xx starts a fresh conversion at the selected output data rate for the channel. At the end of the
conversion, the CHx_SCAL_GAIN is filled-in (or overwritten) with the System Calibration Gain coefficient.
6. The System Calibration Gain Coefficient Determination mode is automatically exited.
7. The computed calibration coefficient is accurate only to the effective resolution of the device and will
probably contain some noise. The noise factor can be minimized by computing over many times, averaging
(externally) and putting the resultant value back into the register. Alternatively, select the output data rate to
be 26.83 sps or 1.67 sps.
Post-calibration Scaling
LMP900xx allows scaling (multiplication and shifting) for the System Calibrated result. This eases downstream
processing, if any. Multiplication is done using the System Calibration Scaling Coefficient in the
CHx_SCAL_SCALING register and shifting is done using the System Calibration Bits Selector in the
CHx_SCAL_BITS_SELECTOR register.
The System Calibration Bits Selector value should ideally be the logarithm (to the base 2) of the System
Calibration Scaling Coefficient value.
There are four distinct sets of System Calibration Scaling and System Calibration Bits Selector Registers for use
with CH0-CH3. CH4-CH6 reuse the registers of CH0-CH2, respectively.
A data-flow diagram of these coefficients can be seen in Figure 43.
Figure 43. Post-calibration Scaling Data-Flow Diagram
CHANNELS SCAN MODE
There are four scan modes. These scan modes are selected using the CH_SCAN: CH_SCAN_SEL bit. The first
scanned channel is FIRST_CH, and the last scanned channel is LAST_CH; they are both located in the
CH_SCAN register.
The CH_SCAN register is double buffered. That is, user inputs are stored in a slave buffer until the start of the
next conversion during which time they are transferred to the master buffer. Once the slave buffer is written,
subsequent updates are disregarded until a transfer to the master buffer happens. Hence, it may be appropriate
to check the CH_SCAN_NRDY bit before programming the CH_SCAN register.
ScanMode0: Single-Channel Continuous Conversion
LMP900xx continuously converts the selected FIRST_CH.
Do not operate in this scan mode if gain ≥ 16 and the LMP900xx is running in background calibration modes
BgcalMode1 or BgcalMode2. If this is the case, then it is more suitable to operate the device in ScanMode2
instead.
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