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Table Of Contents
AN-1958 LMP860X SOIC Evaluation Board
1 Introduction
2 General Description
3 LMP860x Operating Conditions
4 Description of the LMP860x Evaluation Board
5 PCB Layout Guidelines
5.1 Differential Signals
5.2 Power, Ground, and De-Coupling
6 Description of Headers and Connectors of the LMP860x Evaluation Board
7 Schematic With LMP8602MM Mounted
8 Bill of Materials
9 Layout
Layout
www.ti.com
9
Layout
Figure 4.
Layout, Top
Layer
Figure 5.
Layout, Bottom
layer
6
AN-1958 LMP860x
SOIC Evaluation
Board
SNOA545C
–
April 2009
–
Revised April 2013
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2009–2013, Texas Instruments
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