Datasheet

ESD
R
1
IN
+
ESD
R
2
ESD
IN
-
ESD
V
+
V
-
V
-
V
+
0
50 100 150 200 250 300
TIME (s)
0.0
1.0
2.0
3.0
4.0
5.0
OFFSET VOLTAGE DRIFT (PV)
V
S
= 5V
R
L
= 2 k:
5 TYPICAL UNITS
LMP7732
www.ti.com SNOSAZ0E –AUGUST 2007–REVISED MARCH 2013
Figure 44. Start-Up Input Offset Voltage Drift
During the peak-to-peak noise measurement, the LMP7732 must be shielded. This prevents offset variations due
to airflow. Offset can vary by a few nV due to this airflow and that can invalidate measurements of input voltage
noise with a magnitude which is in the same range. For similar reasons, sudden motions must also be restricted
in the vicinity of the test area. The feed-through which results from this motion could increase the observed noise
value which in turn would invalidate the measurement.
DIODES BETWEEN THE INPUTS
The LMP7732 has a set of anti-parallel diodes between their input pins, as shown in Figure 45. These diodes are
present to protect the input stage of the amplifiers. At the same time, they limit the amount of differential input
voltage that is allowed on the input pins. A differential signal larger than the voltage needed to turn on the diodes
might cause damage to the diodes. The differential voltage between the input pins should be limited to ±3 diode
drops or the input current needs to be limited to ±20 mA.
Figure 45. Anti-Parallel Diodes between Inputs
DRIVING AN ADC
Analog to Digital Converters, ADCs, usually have a sampling capacitor on their input. When the ADC's input is
directly connected to the output of the amplifier a charging current flows from the amplifier to the ADC. This
charging current causes a momentary glitch that can take some time to settle. There are different ways to
minimize this effect. One way is to slow down the sampling rate. This method gives the amplifier sufficient time to
stabilize its output. Another way to minimize the glitch, caused by the switch capacitor, is to have an external
capacitor connected to the input of the ADC. This capacitor is chosen so that its value is much larger than the
internal switching capacitor and it will hence provide the charge needed to quickly and smoothly charge the
ADC's sampling capacitor. Since this large capacitor will be loading the output of the amplifier as well, an
isolation resistor is needed between the output of the amplifier and this capacitor. The isolation resistor, R
ISO
,
separates the additional load capacitance from the output of the amplifier and will also form a low-pass filter and
can be designed to provide noise reduction as well as anti-aliasing. The draw back of having R
ISO
is that it
reduces signal swing since there is some voltage drop across it.
Figure 46 (a) shows the ADC directly connected to the amplifier. To minimize the glitch in this setting, a slower
sample rate needs to be used. Figure 46 (b) shows R
ISO
and an external capacitor used to minimize the glitch.
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