Datasheet
V
+
R
1
R
2
IN
+
IN
-
I
1
INPUT STAGE
I
BIAS
CANCELLATION CIRCUIT
Q1 Q2
V
+
R
C
1
R
C
2
LMP7732
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SNOSAZ0E –AUGUST 2007–REVISED MARCH 2013
APPLICATION NOTES
LMP7732
The LMP7732 is a dual low noise, rail-to-rail input and output, low voltage amplifier.
The low input voltage noise of only 2.9 nV/√Hz with a 1/f corner at 3 Hz makes the LMP7732 ideal for sensor
applications where DC accuracy is of importance.
The LMP7732 has high gain bandwidth of 22 MHz. This wide bandwidth enables the use of the amplifier at
higher gain settings while retaining ample usable bandwidth for the application. This is particularly beneficial
when system designers need to use sensors with very limited output voltage range as it allows larger gains in
one stage which in turn increases signal to noise ratio.
The LMP7732 has a proprietary input bias cancellation circuitry on the input stages. This allows the LMP7732 to
have only about 1.5 nA bias current with a bipolar input stage. This low input bias current, paired with the
inherent lower input voltage noise of bipolar input stages makes the LMP7732 an excellent choice for precision
applications. The combination of low input bias current, low input offset voltage, and low input voltage noise
enables the user to achieve unprecedented accuracy and higher signal integrity.
Texas Instruments is heavily committed to precision amplifiers and the market segment they serve. Technical
support and extensive characterization data is available for sensitive applications or applications with a
constrained error budget.
The LMP7732 comes in the 8-Pin SOIC and VSSOP packages. These small packages are ideal solutions for
area constrained PC boards and portable electronics.
INPUT BIAS CURRENT CANCELLATION
The LMP7732 has proprietary input bias current cancellation circuitry on its input stage.
The LMP7732 has rail-to-rail input. This is achieved by having a p-input and n-input stage in parallel. Figure 41
only shows one of the input stages as the circuitry is symmetrical for both stages.
Figure 41 shows that as the common mode voltage gets closer to one of the extreme ends, current I
1
significantly increases. This increased current shows as an increase in voltage drop across resistor R
1
equal to
I
1
*R
1
on IN+ of the amplifier. This voltage contributes to the offset voltage of the amplifier. When common mode
voltage is in the mid-range, the transistors are operating in the linear region and I
1
is significantly small. The
voltage drop due to I
1
across R
1
can be ignored as it is orders of magnitude smaller than the amplifier's input
offset voltage. As the common mode voltage gets closer to one of the rails, the offset voltage generated due to I
1
increases and becomes comparable to the amplifiers offset voltage.
Figure 41. Input Bias Current Cancellation
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