Datasheet

L M K 0 4 8 1 6 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S
SNLU107
40
Clock Outputs (CLKout)
The LMK04816 Family features programmable LVDS, LVPECL, and LVCMOS buffer modes
for the CLKoutX and OSCout0 output pairs. Included below are various phase noise
measurements for each output format.
LMK04816B CLKout Phase Noise
Figure 16: LMK04816B CLKout Phase Noise
Table 14: LMK04816B Phase Noise (dBc/Hz) Phase Noise and RMS Jitter (fs)
Offset
1228.80 MHz
LVDS
1228.80 MHz
LVPECL
491.52 MHz
LVDS
491.52 MHz
LVPECL
100 Hz
-91.2
-90.5
-97.5
-98.2
1 kHz
-111.2
-110.8
-118.7
-119.4
10 kHz
-121.0
-121.1
-128.5
-128.6
100 kHz
-121.3
-121.2
-129.5
-129.5
800 kHz
-133.8
-133.7
-141.9
-141.9
1 MHz
-135.8
-135.7
-143.4
-143.8
10 MHz
-150.2
-150.4
-153.1
-155.7
20 MHz
-150.8
-151.0
-153.8
-155.7
RMS Jitter (fs)
10 kHz to 20 MHz
92.9
93.4
97.5
94.5
RMS Jitter (fs)
100 Hz to 20 MHz
104.0
105.3
109.0
105.4
-170
-160
-150
-140
-130
-120
-110
-100
-90
-80
100 1,000 10,000 100,000 1,000,000 10,000,000
Phase Noise (dBc/Hz)
Frequency Offset (Hz)
1228.8 MHz LVDS
1228.8 MHz LVPECL16
491.52 MHz LVDS
491.52 MHz LVPECL16
245.76 MHz LVDS
245.76 MHz LVCMOS
245.76 MHz LVPECL16
122.88 MHz LVDS
122.88 MHz LVCMOS
122.88 MHz LVPECL16