Datasheet

L M K 0 4 8 1 6 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S
SNLU107
29
PLL1 Tab
Figure 11: PLL1 tab
The PLL1 tab allows the user to change the following parameters in Table 8.
Table 8: Registers Controls and Descriptions in PLL1 tab
Control Name
Register Name
Description
Reference Oscillator
Frequency (MHz)
n/a
CLKin frequency of the selected reference
clock.
Phase Detector Frequency
(MHz)
n/a
PLL1 Phase Detector Frequency (PDF).
This value is calculated as:
PLL1 PDF = CLKin Frequency / (PLL1_R *
CLKinX_PreR_DIV), where
CLKinX_PreR_DIV is the predivider value
of the selected input clock.
VCO Frequency (MHz)
n/a
The VCO Frequency should be the OSCin
frequency, except when operating in Dual
PLL with 0-delay feedback. This value is
calculated as:
VCO Freq (OSCin freq) = PLL1 PDF *
PLL1_N.
In Dual PLL mode with 0-delay feedback,
the VCO frequency should be set to the
feedback clock input frequency. See the
section Setting the PLL1 VCO Frequency
and PLL2 Reference Frequency for details.
R Counter
PLL1_R
PLL1 R Counter value (1 to 16383).