Datasheet

L M K 0 4 8 1 6 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S
SNLU107
18
Connector Name
Signal Type,
Input/Output
Description
Test point:
LD_TP
Not populated:
Status_LD
CMOS,
Output
Programmable status output pin. By default, set to
output the digital lock detect status signal for PLL1 and
PLL2 combined.
In the default CodeLoader modes, LED D5 will
illuminate green when PLL lock is detected by the
LMK04816B (output is high) and turn off when lock is
lost (output is low).
The status output signal for the Status_LD pin can be
selected on the Bits/Pins tab via the LD_MUX control.
Refer to the LMK04816 Family Datasheet section
“Status Pins” and “Digital Lock Detect” for more
information.
Note: Before a high-frequency internal signal (e.g. PLL
divider output signal) is selected by LD_MUX, it is
suggested to first remove the 270 ohm resistor to
prevent the LED from loading the output.
Test point:
Holdover_TP
Not populated:
Status_Hold
CMOS,
Output
Programmable status output pin. By default, set to the
output holdover mode status signal.
In the default CodeLoader mode, LED D8 will
illuminate red when holdover mode is active (output is
high) and turn off when holdover mode is not active
(output is low).
The status output signal for the Status_Holdover pin
can be selected on the Bits/Pins tab via the
HOLDOVER_MUX control.
Refer to the LMK04816 Family Datasheet section
“Status Pins” and “Holdover Mode” for more
information.
Note: Before a high-frequency internal signal (e.g. PLL
divider output signal) is selected by
HOLDOVER_MUX, it is suggested to first remove the
270 ohm resistor to prevent the LED from loading the
output.