Datasheet

November 2013 LMK040xx Evaluation Board User’s Guide SNAU045A 7
Copyright © 2013, Texas Instruments Incorporated
www.ti.com
***The clock outputs tab allows the user to Enable/Disable individual clock channels, select the clock mode
(Bypass/Divided/ Delayed/ Divided & Delayed), set the channel delay value (if Delay is enabled), and the channel
divider value (2,4,6,…,510).
This tab also allows the user to select the VCO Divider value (2,3,…,8). Note that the total PLL2 N divider value is
composed of both the VCO Divider value and the N value shown in the blue box in the image, and is given by:
N
TOTAL
= VCO Divider * N.
Clicking on the blue box that contains R, PDF and N values takes the user to the PLL2 tab where these values may
be changed.
Clicking on the components in the box containing the Internal Loop Filter values allows the user to change these
component values.
The Reference Oscillator value field may be changed in either the Clock Outputs tab or the PLL2 tab. Note this
value MUST match the value of the on-board VCXO (or XTAL option).