Datasheet

November 2013 LMK3806 Evaluation Board SNAU075A 31
Copyright © 2013, Texas Instruments Incorporated
Clock Outputs (CLKout8/9/10/11)
Figure 20 - LMK03806 Clock Outputs 8 through 11 Schematics
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
89Clock Outputs 3/3
11/28/2011
OutClks2.SchDoc
Sheet Title:
Size: Schematic:
Mod. Date:
File:
Rev:
Sheet: of
B
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specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for
any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate
and test your design implementation to confirm the system functionality for your application.
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LMK038xx Evaluation BoardProject:
Designed for:Evaluation Customer
870600688 1.1
Assembly Variant: Customer Eval - 2011-11-22
© Texas Instruments CopyrightYear
0.1µF
C37
0.1µF
C39
0.1µF
C33
0.1µF
C35
CLKout8_N
CLKout8_P
CLKout8
CLKout10
CLKout10_N
CLKout10_P
0.1µF
C38
0.1µF
C40
CLKout11
0.1µF
C34
CLKout9
0.1µF
C36
CLKout9_1_P
CLKout9_1_N
Notes:
1. Designators greater than and equal to 300 are placed on bottom of PCB
CLKout9_P
CLKout9_N
CLKout11_P
CLKout11_N
CLKout8
SMA
CLKout8*
SMA
CLKout9*
SMA
DNP
CLKout9
SMA
DNP
CLKout11*
SMA
DNP
CLKout11
SMA
DNP
CLKout10
SMA
CLKout10*
SMA
Default: LVDS or LVCMOS, AC coupled
Default: LVPECL, AC coupled
Default: LVDS or LVCMOS, AC coupled
Default: LVPECL, AC coupled
CLKout11_1_P
CLKout11_1_N
CLKout10_1_P
CLKout10_1_N
CLKout8_1_P
CLKout8_1_N
51
R66
51
R72
51
R74
51
R80
51
R73
DNP
51
R79
DNP
51
R65
DNP
51
R71
DNP
240
R67
DNP
GND
240
R69
DNP
GND
240
R75
GND
240
R77
GND
240
R78
GND
240
R76
GND
240
R70
DNP
GND
240
R68
DNP
GND