Datasheet

30 SNAU075A LMK3806 Evaluation Board November 2013
Copyright © 2013, Texas Instruments Incorporated
Clock Outputs (CLKout 4/5/6/7)
Figure 19 - LMK03806 Clock Outputs 4 through 7 Schematics
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
79Clock Outputs 2/3
11/28/2011
OutClks1.SchDoc
Sheet Title:
Size: Schematic:
Mod. Date:
File:
Rev:
Sheet: of
B
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this
specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for
any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate
and test your design implementation to confirm the system functionality for your application.
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LMK038xx Evaluation BoardProject:
Designed for: Evaluation Customer
870600688 1.1
Assembly Variant: Customer Eval - 2011-11-22
© Texas Instruments CopyrightYear
0.1µF
C25
0.1µF
C27
CLKout4_N
CLKout4_P
CLKout4
0.1µF
C30
0.1µF
C32
CLKout7
0.1µF
C29
CLKout6_N
CLKout6_P
CLKout6
0.1µF
C31
CLKout5
Notes:
1. Designators greater than and equal to 300 are placed on bottom of PCB
CLKout5_N
CLKout5_P
CLKout7_N
CLKout7_P
CLKout4
SMA
CLKout4*
SMA
CLKout5*
SMA
DNP
CLKout5
SMA
DNP
CLKout7*
SMA
DNP
CLKout7
SMA
DNP
CLKout6
SMA
CLKout6*
SMA
Default: LVDS or LVCMOS, AC coupled
Default: LVDS or LVCMOS, AC coupled
Default: LVDS or LVCMOS, AC coupled
Default: LVDS or LVCMOS, AC coupled
CLKout6_1_P
CLKout6_1_N
CLKout4_1_P
CLKout4_1_N
CLKout7_1_P
CLKout7_1_N
CLKout5_1_P
CLKout5_1_N
51
R47
DNP
51
R53
DNP
51
R55
DNP
51
R63
DNP
51
R56
51
R64
51
R48
51
R54
240
R58
DNP
GND
240
R61
DNP
GND
240
R51
DNP
GND
240
R49
DNP
GND
240
R50
DNP
GND
240
R52
DNP
GND
240
R59
DNP
GND
240
R62
DNP
GND
33
R57
33
R60
CLKout6_2_P
CLKout6_2_N
0.1µF
C26
0.1µF
C28