Datasheet
28 SNAU075A LMK3806 Evaluation Board November 2013
Copyright © 2013, Texas Instruments Incorporated
LMK03806B Device with Loop Filter and Crystal Circuits
Figure 17 - LMK03806 Device Schematic
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C C
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39Main Sheet / IC
11/30/2011
LMK03806_PLL.SchDoc
Sheet Title:
Size: Schematic:
Mod. Date:
File:
Rev:
Sheet: of
B
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this
specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for
any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate
and test your design implementation to confirm the system functionality for your application.
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LMK038xx Evaluation BoardProject:
Designed for: Evaluation Customer
870600688 1.1
Assembly Variant: Customer Eval - 2011-11-22
© Texas Instruments CopyrightYear
220pF
C2pLF
DNP
0.1µF
C10
DNP
0.1µF
C5
Y1
DNP
22pF
C9
DNP
22pF
C6
PLL Loop Filters
Y2
DNP
DNP
VTUNE_TP
XTAL-mode Loop Filter
10µF
C7
0.1µF
C8
CLKout0_P
CLKout0_N
CLKout1_P
CLKout1_N
CLKout2_P
CLKout2_N
CLKout3_P
CLKout3_N
CLKout4_P
CLKout4_N
CLKout5_P
CLKout5_N
OSCout1_P
OSCout1_N
CLKout11_N
CLKout11_P
CLKout10_N
CLKout10_P
CLKout9_N
CLKout9_P
CLKout8_N
CLKout8_P
CLKout7_N
CLKout7_P
CLKout6_N
CLKout6_P
uWire_DATA
uWire_CLK
uWire_LE
OSCout0_N
OSCout0_P
VccCore
Vcc2_CLKout_CG1
Vcc3_CLKout_CG2 VccCore VccCore
VccCore
VccCore
VccCore
Vcc12_CLKout_CG5
Vcc13_CLKout_CG0
Vcc8_PDCP2
OSCin_N
OSCin_P
uWire_LE
uWire_DATA
uWire_CLK
100
R17
DNP
270
R15
270
R19
820
R2_LF
220pF
C1_LF 0.018µF
C2_LF
Vcc10_CLKout_CG3
Vcc11_CLKout_CG4
51
R300
DNP
CLKout0
1
CLKout0*
2
CLKout1
4
CLKout1*
3
NC
5
SYNC*
6
NC
7
NC
8
NC
9
Vcc1
10
LDObyp1
11
LDObyp2
12
CLKout4
19
CLKout4*
20
CLKout5
22
CLKout5*
21
GND
23
Vcc4
24
NC
25
NC
26
Readback
27
NC
28
NC
29
Vcc5
30
Vcc6
35
OSCin
36
OSCin*
37
Vcc7
38
OSCout0
39
OSCout0*
40
Vcc8
41
CPout
42
Vcc9
43
LEuWire
44
CLKuWire
45
DATAuWire
46
CLKout7
51
Vcc11
52
CLKout8
53
CLKout8*
54
CLKout9*
55
CLKout9
56
Vcc12
57
CLKout10
58
CLKout10*
59
CLKout11*
60
CLKout11
61
GPout0
62
LMK03806
DAP PAD
0
CLKout2
13
CLKout2*
14
CLKout3*
15
CLKout3
16
Vcc2
17
Vcc3
18
OSCout1
31
OSCout1*
32
Ftest/LD
33
NC
34
Vcc10
47
CLKout6
48
CLKout6*
49
CLKout7*
50
GPout1
63
Vcc13
64
U1
LMK03806
0
R16
DNP
0
R18
OSCin
SMA
DNP
OSCin*
SMA
DNP
Status0_TP
TESTPOINT
270
R2
DNP
Status1_TP
TESTPOINT
Status2_TP
TESTPOINT
Status3_TP
TESTPOINT
270
R1
DNP
270
R24
270
R20
D3
Green
D1
Red
D2
Red
D4
Red
uWire Header and Level Translation
12
34
56
78
910
uWire
HEADER_2X5
15k
R9
27k
R10
DATAuWire_TP
TESTPOINT
27k
R8
15k
R7
CLKuWire_TP
TESTPOINT
27k
R4
LEuWire_TP
TESTPOINT
15k
R3
uWire_CLK
uWire_DATA
uWire_LE
100pF
C4
DNP
100pF
C1
DNP
100pF
C3
DNP
SYNC_TP
TESTPOINT
100pF
C2
DNP
27k
R6
15k
R5
IC_SYNC
IC_SYNC
0
R11
DNP
0
R22
DNP
18
R12
18
R23
270
R14
270
R21
IC_SYNC
SMA
DNP
Out
3
GND
2
Vcont
1
Vcc
4
Y3
TCXO
VccCore
VccCore
0
R104
1.00k
R103
0.1µF
C60
0.1µF
C61
1.00k
R102
1µF
C65
DNP
0.1µF
C64
DNP
0.1µF
C62
DNP
1µF
C63
DNP