Datasheet

November 2013 LMK3806 Evaluation Board SNAU075A 21
Copyright © 2013, Texas Instruments Incorporated
Table 7: Register Controls and Descriptions on Bits/Pins Tab
Group Register Name Description
Mode Control
RESET Resets the device to default register values. RESET
must be cleared for normal operation to prevent an
unintended reset every time R0 is programmed.
POWERDOWN Places the device in powerdown mode.
uWire_LOCK When checked, no other uWire programming will
have effect. Must be unchecked to enable uWire
programming of registers R0 to R30.
Automatic
Update
OSCin_FREQ Sets the OSCin frequency range.
PLL_N_CAL Sets the PLL_N value.
Crystal EN_PLL_XTAL Enables Crystal Oscillator.
Output Control
READBACK_TYPE Readback pin type. (Labeled Stats0 on PCB)
LD_MUX Ftest/LD pin selection when output. (Ftest/LD
output labeled Status1 on PCB)
LD_TYPE Sets I/O pin type on the LD pin.
GPO0 Sets logic level on the GPO0 pin. (Labeled Status2
on PCB)
GPO1 Sets logic level on the GPO1 pin. (Labeled Status3
on PCB)
IO Control – Sync
SYNC_TYPE Sets I/O pin type on the SYNC pin.
SYNC_POL_INV Sets polarity on SYNC input to active low when
checked. Toggling this bit will initiate a SYNC
event.
SYNC_PLL_DLD Engage SYNC mode until PLL DLD is true
NO_SYNC_CLKoutX_Y Synchronization will not affect selected clock
outputs, where X = even-numbered output and Y =
odd-numbered output.
PLL
PLL_DLD_CNT The reference and feedback of PLL must be within
the window of phase error as specified by
PLL_WND_SIZE for this many cycles before PLL
digital lock detect is asserted.
EN_PLL_REF_2X Enables the doubler block to doubles the reference
frequency into the PLL R counter. This can allow
for frequency of 2/3, 2/5, etc. of OSCin to be used
at the phase detector of PLL.
PLL_R3_LF Set the corresponding integrated PLL loop filter
values: R3, R4, C3, and C4.
It is also possible to set these values by clicking on
the loop filter values on the Clock Outputs tab.
PLL_R4_LF
PLL_C3_LF
PLL_C4_LF
Program Pins
SYNC Sets these pins on the uWire header to logic high
(checked) or logic low (unchecked).
TRIGGER