Datasheet

10 70
FREQUENCY (MHz)
10
5
0
-5
-10
-15
-20
POWER (dBm)
50 80
Minimum Recommended
Power for Differential
Operation
20 30 40 60
100
90
Minimum Recommended
Power for Single-Ended
Operation
0.1 PF
0.1 PF
LMK
Input
100:
100:Trace
(Differential)
Clock Source
0.1 PF
0.1 PF
50:Trace
50:
LMK
Input
Clock Source
LMK03000, LMK03000C, LMK03000D, LMK03001
LMK03001C, LMK03001D, LMK03033, LMK03033C
SNAS381O –NOVEMBER 2006–REVISED MARCH 2013 www.ti.com
8.7.4 Conversion to LVCMOS Outputs
To drive an LVCMOS input with an LMK03000 family LVDS or LVPECL output, an LVPECL/LVDS to
LVCMOS converter such as TI's DS90LV018A, DS90LV028A, DS90LV048A, etc. is required. For best
noise performance, LVPECL provides a higher voltage swing into input of the converter.
8.8 OSCin INPUT
In addition to LVDS and LVPECL inputs, OSCin can also be driven with a sine wave. The OSCin input can
be driven single-ended or differentially with sine waves. The configurations for these are shown in
Figure 8-12 and Figure 8-13. Figure 8-14 shows the recommended power level for sine wave operation for
both differential and single-ended sources over frequency. The part will operate at power levels below the
recommended power level, but as power decreases the PLL noise performance will degrade. The VCO
noise performance will remain constant. At the recommended power level the PLL phase noise
degradation from full power operation (8 dBm) is less than 2 dB.
Figure 8-12. Single-Ended Sine Wave Input
Figure 8-13. Differential Sine Wave Input
Figure 8-14. Recommended OSCin Power for Operation with a Sine Wave Input
36 Application Information Copyright © 2006–2013, Texas Instruments Incorporated
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