Datasheet
0.33 mm, typ
1.2 mm, typ
5.0 mm, min
LMK03000, LMK03000C, LMK03000D, LMK03001
LMK03001C, LMK03001D, LMK03033, LMK03033C
www.ti.com
SNAS381O –NOVEMBER 2006–REVISED MARCH 2013
8.6 THERMAL MANAGEMENT
Power consumption of the LMK03000 family of devices can be high enough to require attention to thermal
management. For reliability and performance reasons the die temperature should be limited to a maximum
of 125 °C. That is, as an estimate, T
A
(ambient temperature) plus device power consumption times θ
JA
should not exceed 125 °C.
The package of the device has an exposed pad that provides the primary heat removal path as well as
excellent electrical grounding to the printed circuit board. To maximize the removal of heat from the
package a thermal land pattern including multiple vias to a ground plane must be incorporated on the PCB
within the footprint of the package. The exposed pad must be soldered down to ensure adequate heat
conduction out of the package. A recommended land and via pattern is shown in Figure 8-3. More
information on soldering WQFN packages can be obtained at www.ti.com.
Figure 8-3. Recommended Land and Via Pattern
To minimize junction temperature it is recommended that a simple heat sink be built into the PCB (if the
ground plane layer is not exposed). This is done by including a copper area of about 2 square inches on
the opposite side of the PCB from the device. This copper area may be plated or solder coated to prevent
corrosion but should not have conformal coating (if possible), which could provide thermal insulation. The
vias shown in Figure 8-3 should connect these top and bottom copper layers and to the ground layer.
These vias act as “heat pipes” to carry the thermal energy away from the device side of the board to
where it can be more effectively dissipated.
Copyright © 2006–2013, Texas Instruments Incorporated Application Information 31
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LMK03033C