Datasheet

LMK03000, LMK03000C, LMK03000D, LMK03001
LMK03001C, LMK03001D, LMK03033, LMK03033C
SNAS381O –NOVEMBER 2006–REVISED MARCH 2013 www.ti.com
8.5 CURRENT CONSUMPTION / POWER DISSIPATION CALCULATIONS
Due to the myriad of possible configurations the following table serves to provide enough information to
allow the user to calculate estimated current consumption of the device. Unless otherwise noted Vcc = 3.3
V, T
A
= 25 °C.
Table 8-1. Block Current Consumption
Power
Current Power
Dissipated in
Block Condition Consumption at Dissipated in
LVPECL emitter
3.3 V (mA) device (mW)
resistors (mW)
Entire device, All outputs off; No LVPECL emitter resistors connected
86.0 283.8 -
core current
Low clock buffer The low clock buffer is enabled anytime one of CLKout0
9 29.7 -
(internal) through CLKout3 are enabled
High clock buffer The high clock buffer is enabled anytime one of the
9 29.7 -
(internal) CLKout4 through CLKout7 are enabled
Fout buffer, EN_Fout = 1 14.5 47.8 -
LVDS output, Bypassed mode 17.8 58.7 -
LVPECL output, Bypassed mode (includes 120 Ω emitter
40 72 60
resistors)
Output buffers
LVPECL output, disabled mode (includes 120 Ω emitter
17.4 38.3 19.1
resistors)
LVPECL output, disabled mode. No emitter resistors
0 0 -
placed; open outputs
Divide enabled, divide = 2 5.3 17.5 -
Divide circuitry
per output
Divide enabled, divide > 2 8.5 28.0 -
Delay enabled, delay < 8 5.8 19.1 -
Delay circuitry per
output
Delay enabled, delay > 7 9.9 32.7 -
Entire device CLKout0 & CLKout4 enabled in Bypassed mode 161.8 474 60
From Table 8-1 the current consumption can be calculated in any configuration. For example, the current
for the entire device with 1 LVDS (CLKout0) & 1 LVPECL (CLKout4) output in Bypassed mode can be
calculated by adding up the following blocks: core current, low clock buffer, high clock buffer, one LVDS
output buffer current, and one LVPECL output buffer current. There will also be one LVPECL output
drawing emitter current, but some of the power from the current draw is dissipated in the external 120 Ω
resistors which doesn't add to the power dissipation budget for the device. If delays or divides are
switched in, then the additional current for these stages needs to be added as well.
For power dissipated by the device, the total current entering the device is multiplied by the voltage at the
device minus the power dissipated in any emitter resistors connected to any of the LVPECL outputs. If no
emitter resistors are connected to the LVPECL outputs, this power will be 0 watts. For example, in the
case of 1 LVDS (CLKout0) & 1 LVPECL (CLKout4) operating at 3.3 volts, we calculate 3.3 V × (86 + 9 + 9
+ 17.8 + 40) mA = 3.3 V × 161.8 mA = 533.9 mW. Because the LVPECL output (CLKout4) has the emitter
resistors hooked up and the power dissipated by these resistors is 60 mW, the total device power
dissipation is 533.9 mW - 60 mW = 473.9 mW.
When the LVPECL output is active, ~1.9 V is the average voltage on each output as calculated from the
LVPECL Voh & Vol typical specification. Therefore the power dissipated in each emitter resistor is
approximately (1.9 V)
2
/ 120 Ω = 30 mW. When the LVPECL output is disabled, the emitter resistor
voltage is ~1.07 V. Therefore the power dissipated in each emitter resistor is approximately (1.07 V)
2
/ 120
Ω = 9.5 mW.
30 Application Information Copyright © 2006–2013, Texas Instruments Incorporated
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