Datasheet

LMK03000, LMK03000C, LMK03000D, LMK03001
LMK03001C, LMK03001D, LMK03033, LMK03033C
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SNAS381O NOVEMBER 2006REVISED MARCH 2013
7.8 REGISTER R15
Programming R15 also activates the frequency calibration routine.
7.8.1 PLL_N[17:0] -- PLL N Divider
These bits program the divide value for the PLL N Divider. The PLL N Divider follows the VCO Divider and
precedes the PLL phase detector. Since the VCO Divider is also in the feedback path from the VCO to the
PLL Phase Detector, the total N divide value, N
Total
, is also influenced by the VCO Divider value. N
Total
=
PLL N Divider × VCO Divider. The VCO frequency is calculated as, f
VCO
= f
OSCin
× PLL N Divider × VCO
Divider / PLL R Divider. Since the PLL N divider is a pure binary counter there are no illegal divide values
for PLL_N[17:0] except for 0.
PLL_N[17:0] PLL N Divider Value
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Invalid
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
. . . . . . . . . . . . . . . . . . ...
0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 0 0 0 760 (default)
. . . . . . . . . . . . . . . . . . ...
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 262143
7.8.2 VCO_DIV[3:0] -- VCO Divider
These bits program the divide value for the VCO Divider. The VCO Divider follows the VCO output and
precedes the clock distribution blocks. Since the VCO Divider is in the feedback path from the VCO to the
PLL phase detector the VCO Divider contributes to the total N divide value, N
Total
. N
Total
= PLL N Divider ×
VCO Divider. The VCO Divider can not be bypassed. See Section 7.8.1 for more information on setting
the VCO frequency.
VCO_DIV[3:0] VCO Divider Value
0 0 0 0 Invalid
0 0 0 1 Invalid
0 0 1 0 2 (default)
0 0 1 1 3
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6
0 1 1 1 7
1 0 0 0 8
1 0 0 1 Invalid
. . . . ...
1 1 1 1 Invalid
7.8.3 PLL_CP_GAIN[1:0] -- PLL Charge Pump Gain
These bits set the charge pump gain of the PLL.
PLL_CP_GAIN[1:0] Charge Pump Gain
0 1x (default)
1 4x
2 16x
3 32x
Copyright © 2006–2013, Texas Instruments Incorporated General Programming Information 27
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