Datasheet

LMK03000, LMK03000C, LMK03000D, LMK03001
LMK03001C, LMK03001D, LMK03033, LMK03033C
www.ti.com SNAS381O –NOVEMBER 2006–REVISED MARCH 2013
7.6.2 VCO_R3_LF[2:0] -- Value for Internal Loop Filter Resistor R3
These bits control the R3 resistor value in the internal loop filter. The recommended setting for
VCO_R3_LF[2:0] = 0 for optimum phase noise and jitter.
VCO_R3_LF[2:0] R3 Value (kΩ)
0 Low (~600 Ω) (default)
1 10
2 20
3 30
4 40
5 to 7 Invalid
7.6.3 VCO_R4_LF[2:0] -- Value for Internal Loop Filter Resistor R4
These bits control the R4 resistor value in the internal loop filter. The recommended setting for
VCO_R4_LF[2:0] = 0 for optimum phase noise and jitter.
VCO_R4_LF[2:0] R4 Value (kΩ)
0 Low (~200 Ω) (default)
1 10
2 20
3 30
4 40
5 to 7 Invalid
7.6.4 OSCin_FREQ[7:0] -- Oscillator Input Calibration Adjustment
These bits are to be programmed to the OSCin frequency. If the OSCin frequency is not an integral
multiple of 1 MHz, then round to the closest value.
OSCin_FREQ[7:0] OSCin Frequency
1 1 MHz
2 2 MHz
... ...
10 10 MHz (default)
... ...
200 200 MHz
201 to 255 Invalid
7.7 REGISTER R14
7.7.1 PLL_R[11:0] -- R Divider Value
These bits program the PLL R Divider and are programmed in binary fashion. Any changes to PLL_R
require R15 to be programmed again to active the frequency calibration routine.
PLL_R[11:0] PLL R Divide Value
0 0 0 0 0 0 0 0 0 0 0 0 Invalid
0 0 0 0 0 0 0 0 0 0 0 1 1
0 0 0 0 0 0 0 0 0 0 1 0 2
. . . . . . . . . . . . ...
0 0 0 0 0 0 0 0 1 0 1 0 10 (default)
. . . . . . . . . . . . ...
1 1 1 1 1 1 1 1 1 1 1 1 4095
Copyright © 2006–2013, Texas Instruments Incorporated General Programming Information 25
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