Datasheet

SNAU118
LMK01801BEVAL Evaluation Board Operating Instructions
3
Table of Figures
Figure 1 - LMK01801 Block Diagram ........................................................................................... 4
Figure 2 - Quick Start Diagram ...................................................................................................... 6
Figure 3 - Pin Control Mode Quick Start Diagram......................................................................... 7
Figure 4 – Selecting the LMK01801 .............................................................................................. 9
Figure 6 – Setting the 122.88 MHz VCXO Default mode ........................................................... 10
Figure 5 - Loading the Device ...................................................................................................... 10
Figure 7 - Setting Divide, CLKout_TYPE, Enabled for CLKout1 on "Clock Outputs" tab. ....... 11
Figure 8 - Setting LVCMOS modes. ............................................................................................ 11
Figure 9 - Port Setup tab ............................................................................................................... 15
Figure 10 - Clock Outputs tab ....................................................................................................... 16
Figure 11 - Bits/Pins tab. .............................................................................................................. 17
Figure 12 - LMK01801 Phase Noise @ 100 MHz with Output Divider = 1 ................................ 20
Figure 13 - LMK01801 Phase Noise @ 100 MHz with Output Divider = 4 ................................ 21
Figure 14 - LMK01801 Phase Noise @ 983.04 MHz with Output Divider = 1 ........................... 22
Figure 15 - LMK01801 Phase Noise @ 983.04 MHz with Output Divider = 4 ........................... 23
Figure 16 - Phase Noise Measurement Set-Up ............................................................................. 24
Figure 17 - Noisy vs. Clean Phase Noise ...................................................................................... 24
Figure 18 - LMK01801 Sample Clock Output Waveforms .......................................................... 25
Figure 19 - CLKout12 and CLKout13 No Analog Delay............................................................. 26
Figure 20 - CLKout12 with 100 pSec of delay relative to CLKout13.......................................... 27
Figure 21 - Typical Balun Frequency Response ........................................................................... 38
Figure 22 - Successfully Opened LPT Driver ............................................................................... 39
Figure 23 - Selecting the LPT Port ............................................................................................... 40
Figure 24 - Two Different Definitions .......................................................................................... 41
Figure 25 - Two Different Definitions .......................................................................................... 41