Datasheet

SNAU118
LMK01801BEVAL Evaluation Board Operating Instructions
19
Appendix B: Typical Phase Noise Performance Plots
Clock Outputs
The LMK01801 Family features LVDS, LVPECL, 2VPECL, and LVCMOS types of outputs.
Include are the phase noise plots for the following outputs.
Device CLKoutX Output Divide Output Type
LMK01801A1 8 1 LVPECL
LMK01801A1 8 4 LVPECL
LMK01801A1 8 1 2VPECL
LMK01801A1 8 4 2VPECL
LMK01801A1 4 1 LVDS
LMK01801A1 4 4 LVDS
LMK01801A1 4 1 LVCMOS(Norm/Inv)
LMK01801A1 4 4 LVCMOS(Norm/Inv)
Table 4 - Phase Noise Output Test Configuration
Clock Output Measurement Technique
The measurement technique for each output type varies.
LVPECL/2VPECL – Measured by using an Minicircuits ADT2-1T balun on the input and on the
output.
LVCMOS and LVDS – Measured by using an Minicircuits ADT2-1T balun on the output and
single ended input.
Parameter Test Case 1 Test Case 2 Test Case 3 Test Case 4
Input Source Wenzel XTAL Wenzel XTAL SMHU Rohde&Schwarz
SMHU
Input Frequency 100 MHz 100 MHz 983.04 MHz 983.04 MHz
Input Power 0 dBm 0 dBm 0 dBm 0 dBm
Output Divider 1 4 1 4
Figure Figure 12 Figure 13 Figure 14 Figure 15
Table 5 - LMK01801 test conditions