Datasheet
1.
Use a ground plane
2.
Include large (~6.8μF) capacitors on both supplies.
3.
Near the device use .01μF ceramic capacitors from both
supplies to ground C
1
, C
3
.
4.
Near the device use a .1μF ceramic capacitor between
the supplies C
5
.
5.
Remove the ground and power planes from under and
around the part, especially the input and output pins.
6.
Minimize all trace lengths.
7.
Use terminated transmission lines for long traces.
8.
High-speed disable/enable operation requires that the
enable pin be treated as a signal input.
Diode D
1
is to protect the device from reverse polarity supply
connections and will not be necessary for most designs.
Capacitor C
5
is necessary for best Harmonic Distortion per-
formance. If C
5
is not used increase the values of C
1
and C
3
to .1μF.
R
IN
, R
T
and R
OUT
are all impedance matching resistors. R
IN
and R
OUT
should be equal to the desired input/output
impedance. R
T
|| R
G
should equal the desired inverting input
impedance. Note that with current feedback op amps, the op-
timum value of R
F
and R
G
is determined by the desired gain
and raising R
G
to obtain higher input impedance may require
compromising device performance at large values of inverting
gain.
The disable trace has provisions for input termination. There
are also pads for series resistance and capacitance for pro-
grammable gain parts. See part datasheets for suggested
values.
Sample artwork for National's Evaluation boards is included
below.
The board is designed for 50Ω input and output connections
into coaxial cables. For other impedances the terminating re-
sistors can be modified to help match different impedances.
Do not use normal oscilloscope probes to test these circuits.
The capacitive loading will change circuit performance dras-
tically. Instead use low impedance resistive divider probes of
100 to 500Ω. See Figure 3 for a sample resistive probe. The
Low impedance resistor should be 50-450Ω. The ground con-
nection should be as short as possible (~1/2"). Even with
careful use of these probes results should be considered pre-
liminary until verified with controlled impedance measure-
ments. Even the best probes will interfere with circuit
operation to some degree. Also, conductors, fingers etc. near
the device will change measurement results.
National Semiconductor Layer1 Silk
20066604
National Semiconductor Layer2 Silk
20066605
SOIC Board Layout (Actual size = 1.5" x 1.5"). The boards may be marked as CLC730227 or LMH730227
3 www.national.com
LMH730227,LMH730216