Datasheet

ADC12D1800RF
LMH6881
ROUT
ROUT
RT
OCM
100:
100:
100:
100:
x2
100:
INDP
INDM
INSP
INSM
N/C
N/C
+1.25V
V =2.5V
V=1.25V
CM
OUTM
OUTP
RT
LMH6881
www.ti.com SNOSC72E –JUNE 2012–REVISED MARCH 2013
Figure 44. DC-Coupled ADC Driver Example 2, Terminated Input ADC
DIGITAL CONTROL OF THE GAIN AND POWER-DOWN PINS
The LMH6881 will support two modes of control for its gain: a parallel mode and a serial mode (SPI compatible).
Parallel mode is fastest and requires the most board space for logic line routing. Serial mode is compatible with
existing SPI-compatible systems. The device has gain settings covering a range of 20 dB. In parallel mode, only
2-dB steps are available. The serial interface should be used for finer gain control of 0.25 dB for a gain between
6 dB and 26 dB of voltage gain. If fixed gain is desired the pins can be strapped to ground or VCC, as required.
The device has a shutdown pin to enable power savings when the amplifier is not being used.
The LMH6881 was designed to interface with 2.5-V to 5-V CMOS logic circuits. If operation with 5-V logic is
required care should be taken to avoid signal transients exceeding the amplifier supply voltage. Long,
unterminated digital signal traces should be avoided. Signal voltages on the logic pins that exceed the device
power supply voltage may trigger ESD protection circuits and cause unreliable operation. Some digital input-
output pins have different functions depending on the digital control mode. Table 2 shows the mapping of the
digital pins. These functions for each pin will be described in the sections PARALLEL INTERFACE and SPI-
COMPATIBLE SERIAL INTERFACE.
Table 2. Pins with Dual Functions
Pin SPI = 0 SPI = 1
3 D1 SDI
4 D0 SDO
(1)
15 D2 CLK
16 D3 CS (active low)
(1) Pin 4 requires external bias. See SPI-COMPATIBLE SERIAL INTERFACE section for Details.
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