Datasheet
+
-
R
IN
51:
X1
-
+
R
OUT
51:
CL
10 pF
R
L
1 k:
V
OUT
+
-
V
IN
+5V
-5V
C
POS
6.8 µF
0.01 µF
6.8 µF
C
NEG
0.01 µF
R
IN
0.1 µF
C
SS
1
1000
FREQUENCY (MHz)
-8
-4
0
4
GAIN (dB)
100
10
-2
-6
-7
-5
-3
-1
1
2
3
V
OUT
= 250 mV
PP
GAIN = +1
PIN 4 FLOATING
PIN 4 SHORTED TO PIN 3
1
10
1000
FREQUENCY (MHz)
100
-8
-4
0
4
GAIN (dB)
2
-2
-6
3
1
-1
-3
-5
-7
V
OUT
= 250 mV
PP
UNCOMPENSATED
C
P
= 1.7 pF
C
P
= 3.3 pF
+
-
R
IN
50:
R
S
100:
R
OUT
50:
C
P
3.3 pF
V
IN
V
OUT
LMH6739
SNOSAD2G –MAY 2004–REVISED MARCH 2013
www.ti.com
The gain of the LMH6739 is accurate to ±1% and stable over temperature. The internal gain setting resistors, R
F
and R
G
, match very well. However, over process and temperature their absolute value will change. Using
external resistors in series with R
G
to change the gain will result in poor gain accuracy over temperature and
from part to part.
Figure 24. Correction for Unity Gain Peaking Figure 25. Frequency Response for Circuit in
Figure 24
UNITY GAIN COMPENSATION
With a current feedback Selectable Gain Buffer like the LMH6739, the feedback resistor is a compromise
between the value needed for stability at unity gain and the optimized value used at a gain of two. The result of
this compromise is substantial peaking at unity gain. If this peaking is undesirable a simple RC filter at the input
of the buffer will smooth the frequency response shown as Figure 24. Figure 25 shows the results of a simple
filter placed on the non-inverting input. See Figure 26 and Figure 27 for another method for reducing unity gain
peaking.
Figure 26. Alternate Unity Gain Compensation Figure 27. Frequency Response for Circuit in
Figure 26
Figure 28. Decoupling Capacitive Loads
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