Datasheet

R
P
|5pF*
PIN NUMBERS SHOWN
FOR SOIC PACKAGE
TO PIN 8 OF
LMH6732
CMOS LOGIC GATE
(WITH ±5V OUTPUT SWING)
* EXPERIMENTALLY
ADJUSTED VALUE
LMH6732
SNOSA47B –FEBRUARY 2003–REVISED MARCH 2013 www.ti.com
The relationship between I
CC
and I
P
is given by:
l
P
= I
CC
/57 (approximate ratio at I
CC
= 3.4mA; consult Figure 45 for relationship at any I
CC
).
Knowing I
P
leads to a direct calculation of R
P
.
R
P
+ 5kΩ = [(V
+
-1.6)-V
−
]/ I
P
R
P
+ 5kΩ= =8.4 /I
P
(for V
+
= 5V and V
−
= −5V).
First, an operating point needs to be determined from the plots & specifications as discussed above. From this, I
P
is obtained. Knowing I
P
and the potential R
P
is tied to, R
P
can be calculated.
EXAMPLE
An application requires that V
S
= ±3V and performance in the 1mA operating point range. The required I
P
can
therefore be determined as follows:
I
P
=21μA
R
P
is connected from pin 8 to V
−
. Calculate R
P
under these conditions:
R
P
+ 5kΩ = [(V
+
-1.6)-V
−
] / I
P
R
P
+ 5kΩ = [(3V-1.6V) - (-3V)] / 21μA
R
P
= 205kΩ
The LMH6732 will have performance similar to R
P
= 412kΩ shown on the datasheet, but with 40% less power
dissipation due to the reduced supply voltages. The op amp will also have a more restricted common-mode
range and output swing.
DYNAMIC SHUTDOWN CAPABILITY
The LMH6732 may be powered on and off very quickly by controlling the voltage applied to R
P
. If R
P
is
connected between pin 8 and the output of a CMOS gate powered from ±5V supplies, the gate can be used to
turn the amplifier on and off. This is shown in Figure 62 below:
Figure 62. Dynamic Control of Power Consumption Using CMOS Logic
When the gate output is switched from high to low, the LMH6732 will turn on. In the off state, the supply current
typically reduces to 1μA or less. The LMH6732's "off state" supply current is reduced significantly compared to
the CLC505. This extremely low supply current in the "off state" is quite advantageous since it allows for
significant power saving and minimizes feed-through. To improve switching time, a speed up capacitor from the
gate output to pin 8 is recommended. The value of this capacitor will depend on the R
P
value used and is best
established experimentally. Turn-on and turn-off times of <20ns (I
CC
= 9mA) are achievable with ordinary CMOS
gates.
EXAMPLE
An open collector logic device is used to dynamically control the power dissipation of the circuit. Here, the
desired connection for R
P
is from pin 8 to the open collector logic device.
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