Datasheet

V
IN
470, KR
g
200, R
in
47, R
g
A1
LMH6629
0.417V
V
set
R
O
R
O
C
O
Vin-
Vin+
V
REF
470, KR
g
1k, R
f
ADC
2.5V
GND
3Vpp
2.5V
2.5V
3Vpp
2.32k
1%
R1
464
1%
R2
600 mVpp
5V
5V
RinK 200 1k Let R,10
f
:=o:==VV
CMo
;5.2
_
=
V
set
= V417.0=
V5.22 x
2
10
+
VppV
diffo
;6
_
=
mVppV
in
600=
:Example
K =
V
diff_o
V
in
=
K
2R
f
R
in
:sExpressionGoverning
=V
set
V2
CM_o
2K +
A2
LMH6629
LMH6629
SNOSB18G –APRIL 2010–REVISED MARCH 2013 www.ti.com
single-ended (SE) to Differential converter / driver for such an application is challenging, especially when there is
some gain required. In addition, the input driver’s linearity (harmonic distortion) must also be high enough such
that the spurs that get through to the ADC input are below the ADC’s LSB threshold or -73 dBc (= 20*log (1/ 2
12
))
or lower in this case. Therefore, it is essential to use a low-noise / low-distortion device to drive a high resolution
ADC in order to minimize the impact on the quantization noise and to make sure that the driver’s distortion does
not dominate the acquired data.
Figure 71 shows a ground referenced bipolar input (symmetrical swing around 0V) SE to differential converter
used to drive a high resolution ADC. The combination of LMH6629’s low noise and the converter architecture
reduces the impact on the ADC noise.
Figure 71. Low-Noise Single-Ended (SE) to Differential Converter
In this circuit, the required gain dictates the resistor ratio “K”. With “K” and the driver output CM voltage (V
O_CM
)
known, V
SET
can be established. Reasonable values for R
f
and R
g
can be set to complete the design.
In terms of output swing, with the LMH6629 output swing capability which requires ~0.85V of headroom from
either rail, the maximum total output swing into the ADC is limited to 6.6 V
PP
(=(5 – 2 x 0.85V) x 2); that is true
with V
O_CM
set to mid-rail between V
+
and V
-
. It should also be noted that the LMH6629’s input CMVR range
includes the lower rail (V
-
) and that is the reason there is great flexibility in setting V
o_CM
by controlling V
SET
.
Another feature is that A1 and A2 inputs act like “virtual grounds” and thus do not see any signal swing. Note that
due to the converter’s biasing, the source, V
IN
, needs to sink a current equal to V
SET
/ R
IN
.
The converter example shown in Figure 71 operates with a noise gain of 6 (=1+ K / 2) and thus requires that the
COMP pin to be tied low (WSON-8 package only). The 1
st
order approximated small signal bandwidth will be 280
MHz (=1.7 GHz / 6V/V) which is computed using 1.7GHz as the GBWP with COMP pin LO.
From a noise point of view, concentrating only on the dominant noise sources involved, here is the expression for
the expected differential noise density at the input of the ADC:
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