Datasheet

LM7121
LMH6628
LMH6628
V
IN
499:
499:
499:
499:
V
OUT
R
f
C
R
C
R
-
+
-
+
+
-
½
½
LMH6628
SNOSA02D MAY 2002REVISED MARCH 2013
www.ti.com
APPLICATION SECTION
LOW NOISE DESIGN
Ultimate low noise performance from circuit designs using the LMH6628 requires the proper selection of external
resistors. By selecting appropriate low valued resistors for R
F
and R
G
, amplifier circuits using the LMH6628 can
achieve output noise that is approximately the equivalent voltage input noise of 2nV/ multiplied by the desired
gain (A
V
).
DC BIAS CURRENTS AND OFFSET VOLTAGES
Cancellation of the output offset voltage due to input bias currents is possible with the LMH6628. This is done by
making the resistance seen from the inverting and non-inverting inputs equal. Once done, the residual output
offset voltage will be the input offset voltage (V
OS
) multiplied by the desired gain (A
V
). Application Note OA-7
(SNOA365) offers several solutions to further reduce the output offset.
OUTPUT AND SUPPLY CONSIDERATIONS
With ±5V supplies, the LMH6628 is capable of a typical output swing of ±3.8V under a no-load condition.
Additional output swing is possible with slightly higher supply voltages. For loads of less than 50, the output
swing will be limited by the LMH6628's output current capability, typically 85mA.
Output settling time when driving capacitive loads can be improved by the use of a series output resistor. See
Figure 22.
LAYOUT
Proper power supply bypassing is critical to insure good high frequency performance and low noise. De-coupling
capacitors of 0.1μF should be placed as close as possible to the power supply pins. The use of surface mounted
capacitors is recommended due to their low series inductance.
A good high frequency layout will keep power supply and ground traces away from the inverting input and output
pins. Parasitic capacitance from these nodes to ground causes frequency response peaking and possible circuit
oscillation. See OA-15 (SNOA367) for more information. Texas Instruments suggests the CLC730036 (SOIC)
dual op amp evaluation board as a guide for high frequency layout and as an aid in device evaluation.
ANALOG DELAY CIRCUIT (ALL-PASS NETWORK)
The circuit in Figure 28 implements an all-pass network using the LMH6628. A wide bandwidth buffer (LM7121)
drives the circuit and provides a high input impedance for the source. As shown in Figure 29, the circuit provides
a 13.1ns delay (with R = 40.2, C = 47pF). R
F
and R
G
should be of equal and low value for parasitic insensitive
operation.
Figure 28. Circuit That Implements an All-pass Network Using the LMH6628
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