Datasheet

LMH6601, LMH6601-Q1
SNOSAK9E –JUNE 2006–REVISED MARCH 2013 www.ti.com
5V ELECTRICAL CHARACTERISTICS (continued)
Single Supply with V
S
= 5V, A
V
= +2, R
F
= 604Ω, SD tied to V
+
, V
OUT
= V
S
/2, R
L
= 150Ω to V
−
unless otherwise specified.
Boldface limits apply at temperature extremes.
(1)
Symbol Parameter Condition Min
(2)
Typ
(2)
Max
(2)
Units
R
IN
Input Resistance 0V ≤ V
IN
≤ 3.5V 10 TΩ
C
IN
Input Capacitance 1.3 pF
+PSRR Positive Power Supply Rejection DC 55 59 dB
Ratio 51
−PSRR Negative Power Supply Rejection DC 53 61 dB
Ratio 50
CMRR Common Mode Rejection Ratio DC 56 68 dB
53
CMVR Input Voltage Range CMRR > 50 dB V
−
-0.20 – V
+
- 1.5 V
I
CC
Supply Current Normal Operation 9.6 11.5
mA
V
OUT
= V
S
/2 13.5
Shutdown 100 nA
SD tied to ≤ 0.5V
(5)
VOH1 Output High Voltage R
L
= 150Ω to V
–
–210 –190
(Relative to V
+
) –480
VOH2 R
L
= 75Ω to V
S
/2 –190 mV
VOH3 R
L
= 10 kΩ to V
–
–60 –12
–110
VOL1 Output Low Voltage R
L
= 150Ω to V
–
+5 +45
(Relative to V
–
) +125
VOL2 R
L
= 75Ω to V
S
/2 +120 mV
VOL3 R
L
= 10 kΩ to V
–
+5 +45
+125
I
O
Output Current V
OUT
< 0.6V from Respective Source 150
Supply
Sink 180
mA
I
O
_1 V
OUT
= V
S
/2, ±100
V
ID
= ±18 mV
(6)
Load Output Load Rating THD < −30 dBc, f = 200 kHz, 20 Ω
R
L
tied to V
S
/2, V
OUT
= 4 V
PP
R
O
_Enabled Output Resistance Enabled, A
V
= +1 0.2 Ω
R
O
_Disabled Output Resistance Shutdown >100 MΩ
C
O
_Disabled Output Capacitance Shutdown 5.0 pF
Miscellaneous Performance
VDMAX Voltage Limit for Disable (Pin 5)
(5)
0 0.5 V
VDMIN Voltage Limit for Enable (Pin 5)
(5)
4.5 5.0 V
I
i
Logic Input Current (Pin 5) SD = 5V
(5)
10 pA
V
_glitch
Turn-on Glitch 2.2 V
T
on
Turn-on Time 1.4 µs
T
off
Turn-off Time 520 ns
Isolation
OFF
Off Isolation 1 MHz, R
L
= 1 kΩ 60 dB
T_OL Overload Recovery <20 ns
(5) SD logic is CMOS compatible. To ensure proper logic level and to minimize power supply current, SD should typically be less than 10%
of total supply voltage away from either supply rail.
(6) “V
ID
” is input differential voltage (input overdrive).
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