Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp, buffer amplifer Buffer SOT 23 5

LMH6559

50:

10nF

100nF100nF

10k:

50:

10k:

LMH6559

www.ti.com

SNOSA57C –APRIL 2003–REVISED MARCH 2013

LMH6559 High-Speed, Closed-Loop Buffer

Check for Samples: LMH6559

FEATURES

DESCRIPTION

The LMH6559 is a high-speed, closed-loop buffer

• Closed-Loop Buffer

designed for applications requiring the processing of

• 1750MHz Small Signal Bandwidth

very high frequency signals. While offering a small

• 4580V/μs Slew Rate

signal bandwidth of 1750MHz, and an ultra high slew

rate of 4580V/μs the LMH6559 consumes only 10mA

• 0.06% / 0.02° Differential Gain/Phase

of quiescent current. Total harmonic distortion into a

• −52dBc THD at 20MHz

load of 100Ω at 20MHz is −52dBc. The LMH6559 is

• Single Supply Operation (3V Min.)

configured internally for a loop gain of one. Input

resistance is 200kΩ and output resistance is but

• 75mA Output Current

1.2Ω. These characteristics make the LMH6559 an

ideal choice for the distribution of high frequency

APPLICATIONS

signals on printed circuit boards. Differential gain and

• Video Switching and Routing

phase specifications of 0.06% and 0.02° respectively

at 3.58MHz make the LMH6559 well suited for the

• Test Point Drivers

buffering of video signals.

• High Frequency Active Filters

The device is fabricated on Texas Instruments' high-

• Wideband DC Clamping Buffers

speed VIP10 process using TI's proven high

• High-Speed Peak Detector Circuits

performance circuit architectures.

• Transmission Systems

• Telecommunications

• Test Equipment and Instrumentation

Typical Schematic

Figure 1.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (36 pages)

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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 LMH6559 High-Speed, Closed-Loop Buffer Check for Samples: LMH6559 FEATURES DESCRIPTION • • • • • • • The LMH6559 is a high-speed, closed-loop buffer designed for applications requiring the processing of very high frequency signals. While offering a small signal bandwidth of 1750MHz, and an ultra high slew rate of 4580V/μs the LMH6559 consumes only 10mA of quiescent current. Total harmonic distortion into a load of 100Ω at 20MHz is −52dBc.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com Absolute Maximum Ratings (1) (2) ESD Tolerance (3) Human Body Model 2000V Machine Model 200V See (4), (5) and Output Short Circuit Duration Supply Voltage (V+ – V−) 13V + Infrared or Convection (20 sec.) 235°C Wave Soldering (10 sec.) 260°C −65°C to +150°C Storage Temperature Range Junction Temperature (1) (2) (3) (4) (5) (6) − V +0.8V, V −0.
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 ±5V Electrical Characteristics Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = +5V, V− = −5V, VO = VCM = 0V and RL = 100Ω to 0V. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units Frequency Domain Response SSBW Small Signal Bandwidth VO < 0.5VPP 1750 GFN Gain Flatness < 0.1dB VO < 0.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com ±5V Electrical Characteristics (continued) Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = +5V, V− = −5V, VO = VCM = 0V and RL = 100Ω to 0V. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min Typ VO = 100mVPP RL = 100Ω to 0V .97 .996 VO = 100mVPP RL = 2kΩ to 0V .99 .
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 5V Electrical Characteristics Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 5V, V− = 0V, VO = VCM = V+/2 and RL = 100Ω to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units Frequency Domain Response SSBW Small Signal Bandwidth VO < 0.5VPP 745 GFN Gain Flatness < 0.1dB VO < 0.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com 5V Electrical Characteristics (continued) Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 5V, V− = 0V, VO = VCM = V+/2 and RL = 100Ω to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units Miscellaneous Performance RIN Input Resistance 200 kΩ CIN Input Capacitance 2.
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 3V Electrical Characteristics (continued) Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 3V, V− = 0V, VO = VCM = V+/2 and RL = 100Ω to V+/2. Boldface limits apply at the temperature extremes. Symbol Min Typ VO = 100mVPP RL = 100Ω to V+/2 .97 .995 VO = 100mVPP RL = 2kΩ to V+/2 .99 .
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com CONNECTION DIAGRAMS VCC 1 2 NC 8 7 VOUT VOUT 3 6 4 5 VIN VCC 2 NC NC VEE Figure 2. 8-Pin SOIC (Top View) See Package Number D (R-PDSO-G8) 8 5 NC VEE NC 1 3 4 VIN Figure 3.
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 Typical Performance Charac teristics At TJ = 25°C; V+ = +5V; V− = −5V; Unless otherwise specified. Frequency Response Frequency Response Over Temperature 3 3 RL = 100: VS = 10V -40°C 0 GAIN (dB) 0 GAIN (dB) -3 VS = 5V -6 25°C -3 85°C 125°C -6 -9 VS = 10V VS = 3V RL = 100: -9 -12 10M 1G 2G 100M 100M 1G Figure 4. Figure 5. Gain Flatness Differential Gain and Phase 1.0 0.036 0.12 VS = 10V RL = 100: 0.10 0.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com Typical Performance Charac teristics (continued) − + At TJ = 25°C; V = +5V; V = −5V; Unless otherwise specified. Transient Response Negative Transient Response Positive for Various VSUPPLY 2.5 2.0 1.5 VS = 10V STEP = 3.3V 2.0 1.0 RL = 100: 1.5 1.0 VOUT (V) VOUT (V) 0.5 0 -0.5 -1.0 0.5 VS = 5V, STEP 2.3VPP 0.0 -0.5 VS = 3V, STEP 1VPP -1.0 -1.5 -1.5 -2.0 -2.0 -2.5 -2.5 0 1 2 3 4 5 0 6 VS = 3V, STEP 1VPP -0.
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 Typical Performance Charac teristics (continued) − + At TJ = 25°C; V = +5V; V = −5V; Unless otherwise specified. THD vs. VOUT for Various Frequencies Voltage Noise 40 -40 VS = 10V 1MHz 35 -45 5MHz NOISE (nV/ Hz ) 30 -50 THD (dBc) RL = 100: 10MHz -55 -60 20MHz 25 20 15 10 10MHz -65 VS = 10V 5 RL = 100: 0 100 -70 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 10k 1k VOUT (VPP) Figure 16. Linearity VOUT vs. VIN VOS vs.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com Typical Performance Charac teristics (continued) − + At TJ = 25°C; V = +5V; V = −5V; Unless otherwise specified. IB vs. VSUPPLY (1) VOS vs. VSUPPLY for Unit 3 6 0 -1 5 125°C -2 4 -3 IB (PA) VOS (mV) 85°C 3 -40°C 2 -40°C -4 -5 25°C 1 -6 25°C 85°C 0 -7 -1 -8 125°C 3 4 5 6 7 8 9 10 3 4 7 8 Figure 22. Figure 23. ROUT vs. Frequency 9 10 PSRR vs.
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 Typical Performance Charac teristics (continued) − + At TJ = 25°C; V = +5V; V = −5V; Unless otherwise specified. VOUT vs. IOUT Sinking VOUT vs. IOUT Sourcing 4.5 0 VS = ±5V -0.5 4 VIN = -4V 3.5 125°C -1.5 VOUT (V) VOUT (V) -1 85°C -2 25°C -2.5 -3 -40°C 3 2.5 25°C 2 85°C 1.5 -40°C 125°C -.35 1 -4 0.5 -4.5 0 VS = ±5V 0 20 40 60 80 VIN = +4V 0 100 -40 -20 ISINK (mA) Figure 28. IO Sinking vs.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com Typical Performance Charac teristics (continued) − + At TJ = 25°C; V = +5V; V = −5V; Unless otherwise specified. Large Signal Pulse Response @ VS = 5V Large Signal Pulse Response @ VS = 10V 2.0 1.5 1.5 1.0 1.0 VOUT (V) VOUT (V) 0.5 VPULSE = 2.3VPP 0 RL = 100: -0.5 0.5 VPULSE = 3.3VPP 0 RL = 100: -0.5 -1.0 -1.0 -1.5 -1.5 -2.0 -2.5 -2.0 0 14 10 20 30 40 50 0 10 20 30 TIME (ns) TIME (ns) Figure 34. Figure 35.
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 APPLICATION NOTES USING BUFFERS A buffer is an electronic device delivering current gain but no voltage gain. It is used in cases where low impedances need to be driven and more drive current is required. Buffers need a flat frequency response and small propagation delay. Furthermore, the buffer needs to be stable under resistive, capacitive and inductive loads.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com In these three options it is seen that there is more than one preferred method to reach an (end) point on a transmission line. Until a certain point the designer can make his own choice but the designer should keep in mind never to break the rules about high frequency transport of signals. An explanation follows in the text below. TRANSMISSION LINES Introduction to transmission lines. The following is an overview of transmission line theory.
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 87 Z= x ln H r + 1.41) (5.98 x h) (0.8W) (2) With this formula it is possible to calculate the line impedance vs. the trace width. Figure 40 shows the impedance associated with a given line width. Using the same formula it is also possible to calculate what happens when εr varies over a certain range of values. Varying the εr over a range of 1 to 10 gives a variation for the Characteristic Impedance of about 40Ω from 80Ω to 38Ω.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com The voltage wavefront of 2.45V will now set about traveling back over the transmission line towards the source, thereby resulting in a reflection caused by the mismatch. On the other hand if the load is less then 50Ω the backwards traveling wavefront is subtracted from the incoming voltage of 2V. Assume the load is 40Ω. Then the voltage across the load is: (80 x 10-3 x 40) = 1.
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 Driving More Than One Input Another transmission line possibility is to route the trace via several points along a transmission line (Figure 37) This is only possible if care is taken to observe certain restrictions. Failure to do so will result in impedance discontinuities that will cause distortion of the signal.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com A INPUT R = Z0 B Z0 E A =1X BEGIN END TRANSMISSION LINE LENGTH V V/2 0 0 3 2 TIME (ns) 1 4 5 Figure 42. To calculate the length of the line it is necessary to measure immediately after the series termination resistor. The voltage at that point remains at half nominal voltage, thus V/2, until the reflection returns and the voltage jumps to V.
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 + RIN RSERIES V + - V - BUFFER INTERNAL CONNECTIONS CL-1 CL-2 L-1 L-2 R-1 R-2 Figure 44. Consider a frequency sweep over the entire spectrum for which the LMH6559 high frequency buffer is active. In the first instance peaking occurs due to the parasitic capacitance connected at the load whereas at higher frequencies the effects of the series combination of L and C become noticeable.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com 6 CL = 0pF 0 -6 CL = 10pF, RS = 50: GAIN (dB) -12 CL = 47pF, RS = 50: -18 CL = 100pF, RS = 50: -24 -30 -36 -42 VS = 10V -48 100k 1M 10M 100M 1G FREQUENCY (Hz) Figure 46.
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 TRACK WIDTH HEIGHT OVER GROUND PLANE (w) (h) UPPER TRACK LAYER INNER LAYER A TOTAL PCB HEIGHT INNER LAYER B BOTTOM TRACK LAYER Figure 47. Using a trace over a ground plane has big advantages over the use of a standard single or double sided board. The main advantage is that the electric field generated by the signal transported over this trace is fixed between the trace and the ground plane e.g.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com RELATIVE DIELECTRIC CONSTANT (Hr 5.0 4.9 4.8 4.7 4.6 4.5 4.4 4.3 4.2 4.1 4.0 3.9 3.8 3.7 3.6 3.5 1M RESIN = 40% RESIN = 45% RESIN = 50% RESIN = 55% RESIN = 60% 10M 100M 1G 10G FREQUENCY (Hz) Figure 49. Routing Power Traces Power line traces routed over a pcb should be kept together for best practice. If not a ground loop will occur which may cause more sensitivity to radiation.
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 V + GND Figure 51. In this arrangement the power lines have been routed in order to avoid ground loops and to minimize sensitivity to noise etc. The same technique is valid when routing a high frequent signal over a board which has no ground plane. In that case is it good practice to route the high frequency signal alongside a ground trace.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com RETURN PATH + SIGNAL IN V GND Figure 53. If the overall density becomes too high it is better to make a design which contains additional metal layers such that the ground planes actually function as ground planes. The costs for such a pcb are increased but the payoff is in overall effectiveness and ease of design.
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LMH6559 www.ti.com SNOSA57C – APRIL 2003 – REVISED MARCH 2013 PCB Board Layout And Component Selection Sound practice in the area of high frequency design requires that both active and passive components be used for the purposes for which they were designed. It is possible to amplify signals at frequencies of several hundreds of MHz using standard through hole resistors. Surface mount devices, however, are better suited for this purpose.
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LMH6559 SNOSA57C – APRIL 2003 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision B (March 2013) to Revision C • 28 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 21-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LMH6559MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMH6559MF SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMH6559MF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.
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PACKAGE MATERIALS INFORMATION www.ti.com 21-Mar-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMH6559MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMH6559MF SOT-23 DBV 5 1000 210.0 185.0 35.0 LMH6559MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMH6559MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.
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