Datasheet

26 dB
OUTA+
OUTA-
+5V
INA+
INA-
26 dB
INB+
INB-
OUTB+
OUTB-
Attenuator
0 dB to 31.5 dB
Attenuator
0 dB to 31.5 dB
ATTEN_A
LATCH _A
EN_A
SPI
ATTEN_B
LATCH _B
EN_B
6
Digital
Control
PULSE_A
PULSE_B
4
2
2
6
GND
0 4 8 12 16 20 24 28 32
-0.20
-0.15
-0.10
-0.05
0.00
0.05
0.10
0.15
0.20
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
GAIN MATCHING ERROR (dB)
ATTENUATION (dB)
PHASE MATCHING ERROR (degrees)
Gain Matching Error
Phase Matching Error
LMH6521
www.ti.com
SNOSB47D MAY 2011REVISED MARCH 2013
High Performance Dual DVGA
Check for Samples: LMH6521
1
FEATURES
DESCRIPTION
The LMH6521 contains two high performance,
2
OIP3 of 48.5 dBm at 200 MHz
digitally controlled variable gain amplifiers (DVGA).
Maximum Voltage Gain of 26 dB
Both channels of the LMH6521 have an independent,
Gain Range of 31.5 dB with 0.5dB Step Size
digitally controlled attenuator followed by a high
Channel Gain Matching of ±0.04 dB
linearity, differential output amplifier. Each block has
Noise Figure of 7.3 dB at Maximum Gain
been optimized for low distortion and maximum
system design flexibility. Each channel has a high
-3 dB Bandwidth of 1200 MHz
speed power down mode.
Low Power Dissipation
The internal digitally controlled attenuator provides
Independent Channel Power Down
precise 0.5dB gain steps over a 31.5dB range. Serial
Three Gain Control Modes:
and parallel programming options are provided. Serial
Parallel Interface
mode programming utilizes the SPI interface. A Pulse
mode is also offered where simple up or down
Serial Interface (SPI)
commands can change the gain one step at a time.
Pulse Mode Interface
The output amplifier has a differential output allowing
Temperature Range –40°C to +85°C
10V
PPD
signal swings on a single 5V supply. The low
Thermally Enhanced, 32–Pin WQFN Package
impedance output provides maximum flexibility when
driving filters or analog to digital converters.
APPLICATIONS
Cellular Base Stations
Wideband and Narrowband IF Sampling
Receivers
Wideband Direct Conversion
Digital Pre-Distortion
ADC Driver
Figure 1. LMH6521 Block Diagram Figure 2. Channel Matching Error (Ch A – Ch B)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2011–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Summary of content (29 pages)