Datasheet

Serial Mode www.ti.com
The dip switches that are used to control gain in parallel mode have different functions in Pulse mode.
SWA, which controls the A channel should be set with the A4, A3, ENA and LATA positions in the OFF
setting. The positions marked A5 and A0 need to be in the ON position. The positions marked A2 and A1
are used to set the DVGA gain step size.
Table 1. SWG Switch Settings for Pulse Mode
SWGA A5 A4 A3 A2 A1 A0 ENBA LATA
SWGB B5 B4 B3 B2 B1 B0 ENBB LATB
Position ON OFF OFF A/R A/R ON OFF OFF
The switch marked SWB controls the B channel and should be configured as follows: positions marked
B4, B3, ENB and LATB set to OFF, the positions marked B5 and B0 need to be in the ON position. The
positions marked B2 and B1 set the channel B gain step size. See the product data sheet for step size
options. Note that if the switch marked B5 on SWGB is in the Off position the entire amplifier will be in an
undefined state and will not operate correctly.
The push button switches located between the DVGA and the Parallel DIP switch banks are for use in
pulse mode. The UPA and UPB buttons increment the gain up one step while the DNA and DNB buttons
decrement the gain by one step. The gain step sizes are set by the DIP switches labeled S1 and S0 on
the parallel control DIP switches. Each channel can have a different gain step size.
Table 2. Pulse Mode Gain Step Sizes
S1 and S0 are Located in SWGA and SWGB
S1 S0 Gain Step Size
On On 0.5dB
On Off 1dB
Off On 2dB
Off Off 6dB
9 Serial Mode
Serial mode is the most complex control mode and is considerably slower than parallel mode, but it is very
flexible and requires fewer digital control lines. To use Serial Mode the Mode switches should be set such
that MODE 1 is in the OFF position and MODE2 is in the ON position. Note that if the switch marked B5
on SWGB is in the Off position the entire amplifier will be in an undefined state and will not operate
correctly.
Serial mode requires external logic, either from a microcontroller or logic analyzer. A 0.1” header strip is
located near SWGA (J1). This strip can be used to connect a microcontroller or logic analyzer to the serial
control pins, the pulse control pins and the channel A parallel control pins. The header pin functions are
shown in the table below. Please refer to the product data sheet for the full description of these pin
functions.
Please note that the SWGA dip switches will impact the on-board impedance for the J1 header pins. If the
SWGA dip switches are set to the OFF position, there is no on-board termination for the J1 header pins
and they will appear as high impedance to the logic analyzer. Make sure that this does not result in logic
signals that are beyond the absolute maximum rating for the LMH6517. When the SWGA dip switches are
in the ON position there are 50Ω resistors to ground connected the header pins in parallel with the
LMH6517 logic pins. Some digital sources are unable to drive this load condition. If it seems that the
LMH6517 is not responding to digital control signals this could be one cause.
To aid in the evaluation of SPI controlled devices, TI manufactures the SPUSI2 board and provides the
TinyI2CSPI software to control it. The software and the SPUSI2 evaluation board kit can be ordered from
the TI website. The software is Windows
®
compatible. The first step for using the board in serial mode is
to place the MODE switches in the proper configuration. The MODE1 switch will be in the OFF position
and the MODE2 switch will be in the ON position. Directions for installing the USB control software and
evaluation board drivers are in the user's guide available on the TI website.
6
AN-2081 LMH6517EVAL-R1 Evaluation Board SNOA553B–October 2010–Revised May 2013
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