Datasheet

LMH6321
www.ti.com SNOSAL8C –APRIL 2006–REVISED MARCH 2013
As seen in the previous example, buffer dissipation in DC circuit applications is easily computed. However, in AC
circuits, signal wave shapes and the nature of the load (reactive, non-reactive) determine dissipation. Peak
dissipation can be several times the average with reactive loads. It is particularly important to determine
dissipation when driving large load capacitance.
A selection of thermal data for the SO PowerPAD package is shown in Table 2. The table summarizes θ
JA
for
both 0.5 watts and 0.75 watts. Note that the thermal resistance, for both the DDPAK and the SO PowerPAD
package is lower for the higher power dissipation levels. This phenomenon is a result of the principle of Newtons
Law of Cooling. Restated in term of heatsink cooling, this principle says that the rate of cooling and hence the
thermal conduction, is proportional to the temperature difference between the junction and the outside
environment (ambient). This difference increases with increasing power levels, thereby producing higher die
temperatures with more rapid cooling.
Table 2. θ
JA
vs. Copper Area and P
D
for SO PowerPAD. 1.0 oz cu Board. No Airflow. Ambient
Temperature = 22°C
Copper Area/Vias θJA @ 0.5W θJA @ 0.75W
(°C/W) (°C/W)
1 Layer = 0.05 sq. in. (Bottom) + 3 Via Pads 141.4 138.2
1 Layer = 0.1 sq. in. (Bottom) + 3 Via Pads 134.4 131.2
1 Layer = 0.25 sq. in. (Bottom) + 3 Via Pads 115.4 113.9
1 Layer = 0.5 sq. in. (Bottom) + 3 Via Pads 105.4 104.7
1 Layer = 1.0 sq. in. (Bottom) + 3 Via Pads 100.5 100.2
2 Layer = 0.5 sq. in. (Top)/ 0.5 sq. in. (Bottom) + 33 93.7 92.5
Via Pads
2 Layer = 1.0 sq. in. (Top)/ 1.0 sq. in. (Bottom) + 53 82.7 82.2
Via Pads
ERROR FLAG OPERATION
The LMH6321 provides an open collector output at the EF pin that produces a low voltage when the Thermal
Shutdown Protection is engaged, due to a fault condition. Under normal operation, the Error Flag pin is pulled up
to V
+
by an external resistor. When a fault occurs, the EF pin drops to a low voltage and then returns to V
+
when
the fault disappears. This voltage change can be used as a diagnostic signal to alert a microprocessor of a
system fault condition. If the function is not used, the EF pin can be either tied to ground or left open. If this
function is used, a 10 kΩ, or larger, pull-up resistor (R
2
in Figure 52) is recommended. The larger the resistor the
lower the voltage will be at this pin under thermal shutdown. Table 3 shows some typical values of V
EF
for 10 kΩ
and 100 kΩ.
Table 3. V
EF
vs. R
2
R
2
( inFigure 52) @ V
+
= 5V @V
+
= 15V
10 kΩ 0.24V 0.55V
100 KΩ 0.036V 0.072V
SINGLE SUPPLY OPERATION
If dual supplies are used, then the GND pin can be connected to a hard ground (0V) (as shown in Figure 52).
However, if only a single supply is used, this pin must be set to a voltage of one V
BE
(∼0.7V) or greater, or more
commonly, mid rail, by a stiff, low impedance source. This precludes applying a resistive voltage divider to the
GND pin for this purpose. Figure 56 shows one way that this can be done.
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