Datasheet

LMH1983
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SNLS309G APRIL 2010REVISED JANUARY 2011
PCB DESIGN DO's and DON'Ts
DO whenever possible dedicate an entire layer to each power supply. This will reduce the inductance in the
supply plane.
DO use surface mount components whenever possible.
DO place bypass capacitors and filter components as close as possible to each power pin.
DO place the loop filter components, including the buffer amplifier, and VCXO as close as possible to the
LMH1983.
DON'T allow discontinuities in the ground planes – return currents follow the path of least resistance. For high
frequency signals this will be the path of least inductance.
DO make sure to match the trace lengths of all differential traces.
DO remember that VIAs have significant inductance when using a VIA to connect to a power supply or
ground layer, two in parallel will reduce the inductance over a singe VIA.
DO connect the pad on the bottom of the package to a solid ground connection. This contact is used as a
major ground connection as well as providing a thermal conduit which helps to maintain a constant die
temperature.
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