Datasheet
LMH1982
www.ti.com
SNLS289C –APRIL 2008–REVISED MARCH 2013
Supported Standards and Timing Formats
Table 1 lists the known supported standard timing formats and includes the relevant parameters that can be used
to configure the LMH1982 for the input reference and output timing. For the related programming instructions,
see sections INPUT REFERENCE and OUTPUT CLOCKS AND TOF.
Table 1. Input Reference and Output Timing Parameters
(1)(2)
INPUT TIMING PARAMETERS
(1)
OUTPUT TIMING PARAMETERS
(2)
PLL 1 Phase
PLL 1 PLL 1 Total Lines Clock Total Clocks Total Lines
Format
Comparison Frame Rate
Reference Feedback per Frame Frequency per Line per Frame
Frequency (Hz)
Divider
1
(3)
Divider Counter (MHz) Counter Counter
(kHz)
NTSC, 525i 1 1716 15.7343 525 27.0 1716 525 29.97
PAL, 625i 1 1728 15.625 625 27.0 1728 625 25
1 858 31.4685 525
525p 27.0 858 525 59.94
[5] [4290] [6.2937] [105]
1 864 31.25 625
625p 27.0 864 625 50
[5] [4320] [6.25] [125]
1 600 45.0 750 74.25 1650 750
720p/60 60
[5] [3000] [9.0] [150] (27.0) (600) (750)
74.176 1650 750
720p/59.94 5 3003 8991.0090 750 59.94
(27.0) (3003) (150)
1 720 37.5 750 74.25 1980 750
720p/50 50
[5] [3600] [7.5] [150] (27.0) (720) (750)
1 1200 22.5 750 74.25 3300 750
720p/30 30
[5] [6000] [4.5] [150] (27.0) (1200) (150)
74.176 3300 750
720p/29.97 5 6006 4.4955 750 29.97
(27.0) (6006) (150)
1 1440 18.75 750 74.25 3960 750
720p/25 25
[5] [7200] [3.75] [150] (27.0) (1440) (750)
1 1500 18.0 750 74.25 4125 750
720p/24 24
[5] [7500] [3.6] [150] (27.0) (1500) (750)
74.176 4125 750
720p/23.98 2 3003 8991.0090 750 23.98
(27.0) (3003) (375)
1 400 67.5 1125 148.5 2200 1125
1080p/60 60
[5] [2000] [13.5] [225] (27.0) (400) (1125)
148.35 2200 1125
1080p/59.94 5 2002 13.4865 1125 59.94
(27.0) (2002) (225)
1 480 56.25 1125 148.5 2640 1125
1080p/50 50
[5] [2400] [11.25] [225] (27.0) (480) (1125)
1 800 33.75 1125 74.25 2200 1125
1080p/30 30
[5] [4000] [6.75] [225] (27.0) (800) (1125)
74.176 2200 1125
1080p/29.97 5 4004 6.7433 1125 29.97
(27) (4004) (225)
1 960 28.125 1125 74.25 2640 1125
1080p/25 25
[5] [4800] [5.625] [225] (27.0) (960) (1125)
1 1000 27.0 1125 74.25 2750 1125
1080p/24 24
[5] [5000] [5.4] [225] (27.0) (1000) (1125)
1 1001 26.9730 1125 74.176 2750 1125
1080p/23.98 23.98
[5] [5005] [5.3946] [225] (27.0) (1001) (1125)
(1) For some input reference formats, an alternative set of values for PLL 1 dividers and total lines per frame (REF_LPFM) is also shown in
brackets “[ ]”. This alternative set of values may be programmed if a lower PLL 1 phase comparison frequency is desired. The
corresponding counter values for REF_LPFM needs to be programmed for proper reference frame and output timing generation. See
section Reference Frame Timing.
(2) For any output HD format, an alternative set of counter values for total clocks per line (TOF_PPL) and total lines per frame (TOF_LPFM)
is shown in parenthesis “( )”. This alternative set of values can be programmed to generate any HD format TOF pulse using the 27
MHz SD_CLK instead of using the native 74.xx or 148.xx MHz HD_CLK. See section HD Format TOF Generation using a 27 MHz TOF
Clock.
(3) The PLL 1 reference divider value is not the same as the programming value for REF_DIV_SEL. See Table 3.
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