Datasheet

LOOP
FILTER
VCXO
LMH1982
MULTI-RATE
CLOCK GENERATOR
REF_A
REF_B
SD_CLK
HD_CLK
LPF
TOF
27 or
67.5 MHz
TX
RX_1
GENLOCKED 3G-SDI OUT (1,2)
or
LOOPED 3G-SDI OUT (3)
3G-SDI IN (1,2,3)
LMH1981
MULTI-FORMAT VIDEO
SYNC SEPARATOR
H sync
V sync
ANALOG
REF. IN (1)
H sync
V sync
V
C
27 MHz
FPGA
with SerDes
TRIPLE-RATE SDI
VCXO
FRAME
BUFFER*
RX_2
SDI REF. IN (2)
RECOVERED SYNC TIMING FROM
SDI REF. IN (2) or 3G-SDI IN (3)
* FOR GENLOCK APPLICATION (1,2)
74.25,
74.176,
148.5 or 148.35 MHz
TOF
APPLICATION KEY
(1) VIDEO FOR ANALOG GENLOCK
(2) VIDEO FOR SDI GENLOCK
(3) VIDEO FOR SDI LOOP-THROUGH
LOOP
FILTER
VCXO
LMH1982
MULTI-RATE
CLOCK GENERATOR
REF_A
REF_B
SD_CLK
HD_CLK
LPF
TOF
TX
RX_1
LOOPED
3G-SDI OUT
3G-SDI IN
H sync
V sync
H sync
V sync
V
C
27 MHz
FPGA
with SerDes
TRIPLE-RATE SDI
VCXO
RECOVERED SYNC TIMING
FROM 3G-SDI IN
27 or
67.5 MHz
74.25,
74.176,
148.5 or 148.35 MHz
TOF
UNUSED
INPUTS
LMH1982
www.ti.com SNLS289C –APRIL 2008–REVISED MARCH 2013
Figure 17. Triple-Rate SDI Loop-through
Figure 18. Combined Genlock or Loop-Through for Triple-Rate SDI Video
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