Datasheet

LMH1980

SNLS263A –JULY 2007–REVISED MARCH 2013

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LOGIC OUTPUTS

In the absence of a video input signal, the LMH1980 outputs are logic high except for the odd/even field, which is

undefined and depends on its previous state, and the composite sync output.

Horizontal Sync Output

HSOUT (pin 6) produces a negative-polarity horizontal sync signal, or HSync, extracted from the input signal. For

bi-level and tri-level sync signals, HSync's negative-going leading edge is derived from the input's sync

reference, O

, with a propagation delay.

Important: The HSync output has good performance on its negative-going leading edge, so it should be used as

the reference to a negative-edge triggered PLL input. If HSync is used as the reference to a positive-edge

triggered PLL input, like in some FPGAs, the signal must be inverted first to produce a positive-polarity HSync

signal (i.e.: positive-going leading edge) before the PLL input. HSync's trailing edge should not be used as the

reference to a PLL because for a NTSC/PAL input, the input's half-width pulses (½T

SYNC

) in the vertical interval

cause the trailing edges of the HSync output to occur earlier than for the normal-width sync pulses (T

SYNC

). This

bi-modal timing variation on HSync's trailing edge, as shown in Figure 13, could affect the performance of the

PLL. The bi-modal trailing edge timing also occurs on the CSync output as well.

Figure 13. Bi-modal Timing on HSync's Trailing Edge for Half-Width Pulses for NTSC

Vertical Sync Output

VSOUT (pin 7) produces a negative-polarity vertical sync signal, or VSync. VSync's negative-going leading edge

is derived from the first vertical serration pulse with a propagation delay, and its output pulse width, T

VSOUT

spans approximately three horizontal periods (3H). When there is no vertical serration pulses (i.e.: non-standard

video signal), the LMH1980 will output a default VSync pulse derived from the input's vertical sync leading edge

with a propagation delay.

Composite Sync Output

CSOUT (pin 8) simply reproduces the video input sync pulses below the video blanking level. This is obtained by

clamping the video signal sync tip to the internal clamp voltage at V

and extracting the resultant composite sync

signal, or CSync. For both bi-level and tri-level syncs, CSync's negative-going leading edge is derived from the

input's negative-going leading edge with a propagation delay.

Burst/Back Porch Timing Output

BPOUT (pin 9) provides a negative-polarity burst/back porch signal, which is pulsed low for a fixed width during

the back porch interval following the input's sync pulse. The burst/back porch timing pulse is useful as a burst

gate signal for NTSC/PAL color burst synchronization and as a clamp signal for black level clamping (DC

restoration) and sync stripping applications.

Product Folder Links: LMH1980