Datasheet

LMH0395
SNLS323L –AUGUST 2010–REVISED APRIL 2013 www.ti.com
Pin Descriptions – Pin Mode (non-SPI) / SPI_EN = GND (continued)
Pin Name I/O, Type Description
19 AUTO SLEEP I, LVCMOS Auto Sleep. AUTO SLEEP has precedence over MUTE and BYPASS. This pin has an
internal pullup.
H = When no input signal is detected, the device will power down and the outputs will be
in a high impedance state.
L = Device will not enter auto power down.
20 V
CC
Power Positive power supply (+2.5V).
21 MUTE I, LVCMOS Output mute. CD may be tied to this pin to inhibit the output when no input signal is
present. MUTE has precedence over BYPASS. This pin has an internal pulldown.
H = Outputs are forced to a constant logic high state.
L = Outputs are enabled.
22 CD O, LVCMOS Carrier detect.
H = No input signal detected.
L = Input signal detected.
23 V
EE
Ground Negative power supply (ground).
24 V
CC
Power Positive power supply (+2.5V).
DAP V
EE
Ground Connect exposed DAP to negative power supply (ground).
Pin Descriptions – SPI Mode / SPI_EN = V
CC
Pin Name I/O, Type Description
1 V
EE
Ground Negative power supply (ground).
2 V
EE
Ground Negative power supply (ground).
3 SDI I, SDI Serial data true input.
4 SDI I, SDI Serial data complement input.
5 V
EE
Ground Negative power supply (ground).
6 SPI_EN I, LVCMOS SPI register access enable. This pin has an internal pulldown.
H = SPI register access mode.
L = Pin mode.
7 SDO1_DISABLE I, LVCMOS Output driver 1 (SDO1, SDO1) disable. This pin has an internal pullup.
H (or no connection) = Output driver 1 is in a high impedance state.
L = Output driver 1 is enabled.
8 AEC+ I/O, Analog AEC loop filter external capacitor (1µF) positive connection (capacitor is optional).
9 AEC- I/O, Analog AEC loop filter external capacitor (1µF) negative connection (capacitor is optional).
10 CD O, LVCMOS Carrier detect.
H = No input signal detected.
L = Input signal detected.
11 MUTE
REF
I, Analog Mute reference input. Sets the threshold for CD and (with CD tied to MUTE) determines
the maximum cable to be equalized before muting. MUTE
REF
may be either unconnected
or connected to ground for normal CD operation.
12 V
EE
Ground Negative power supply (ground).
13 SS (SPI) I, LVCMOS SPI slave select. This pin has an internal pullup.
14 SDO0 O, LVDS Serial data output 0 complement.
15 SDO0 O, LVDS Serial data output 0 true.
16 V
EE
Ground Negative power supply (ground).
17 SDO1 O, LVDS Serial data output 1 complement.
18 SDO1 O, LVDS Serial data output 1 true.
19 MISO (SPI) O, LVCMOS SPI Master Input / Slave Output. LMH0395 control data transmit.
20 V
CC
Power Positive power supply (+2.5V).
21 SCK (SPI) I, LVCMOS SPI serial clock input.
22 MOSI (SPI) I, LVCMOS SPI Master Output / Slave Input. LMH0395 control data receive. This pin has an internal
pulldown.
23 V
EE
Ground Negative power supply (ground).
24 V
CC
Power Positive power supply (+2.5V).
DAP V
EE
Ground Connect exposed DAP to negative power supply (ground).
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