Datasheet

LMH0394
SNLS312L –AUGUST 2010–REVISED APRIL 2013 www.ti.com
• Avoid sharp bends in the signal path; use 45° or radial bends.
• Place bypass capacitors close to each power pin, and use the shortest path to connect equalizer power and
ground pins to the respective power or ground planes.
• Remove ground plane under input/output components to minimize parasitic capacitance.
SPI Registers
Table 1. SPI Registers
Address R/W Name Bits Field Default Description
00h R/W General Control 7 Carrier Detect Read only.
0: No carrier detected.
1: Carrier detected.
6 Mute 0 Mute has precedence over
Bypass.
0: Normal operation.
1: Outputs muted.
5 Bypass 0 0: Normal operation.
1: Equalizer bypassed.
4:3 Sleep Mode 01 Sleep mode control. Sleep has
precedence over Mute and
Bypass.
00: Disable sleep mode (force
equalizer to stay enabled).
01: Sleep mode active when no
input signal detected.
10: Force equalizer into sleep
mode (powered down)
regardless of whether there is
an input signal or not.
11: Reserved.
2 Reserved 0 Reserved as 0. Always write 0
to this bit.
1 Master Reset 0 Reset registers and state
machine. (This bit is self-
clearing.)
0: Normal operation.
1: Reset registers and state
machine.
0 Acquisition Reset 0 Reset state machine. (This bit is
self-clearing.)
0: Normal operation.
1: Reset state machine.
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