Datasheet

LMH0384
SNLS308F –APRIL 2009–REVISED APRIL 2013 www.ti.com
4. The LMH0384 default output common mode voltage is different than that of the LMH0344. In most cases,
this should not cause an issue. The LMH0384 and LMH0344 outputs can both be DC coupled to TI's SDI
reclockers and cable drivers. In addition, the LMH0384 output can be DC coupled to LVDS and other inputs
that require lower input common mode voltages than the LMH0344. The LMH0384 output common mode
voltage is adjustable via the SPI.
PCB LAYOUT RECOMMENDATIONS
For information on layout and soldering of the WQFN package, please refer to the following application note: AN-
1187 Leadless Leadframe Package (LLP) (SNOA401).
The SMPTE 424M, 292M, and 259M standards have stringent requirements for the input return loss of receivers,
which essentially specify how closely the input must resemble a 75Ω network. Any non-idealities in the network
between the BNC and the equalizer will degrade the input return loss. Care must be taken to minimize
impedance discontinuities between the BNC and the equalizer to ensure that the characteristic impedance of this
trace is 75Ω. Please consider the following PCB recommendations:
• Use surface mount components, and use the smallest components available. In addition, use the smallest
size component pads.
• Select trace widths that minimize the impedance mismatch between the BNC and the equalizer.
• Select a board stack up that supports both 75Ω single-ended traces and 100Ω loosely-coupled differential
traces.
• Place return loss components closest to the equalizer input pins.
• Maintain symmetry on the complimentary signals.
• Route 100Ω traces uniformly (keep trace widths and trace spacing uniform along the trace).
• Avoid sharp bends in the signal path; use 45° or radial bends.
• Place bypass capacitors close to each power pin, and use the shortest path to connect equalizer power and
ground pins to the respective power or ground planes.
SPI REGISTERS
Table 1. SPI Registers
Address R/W Name Bits Field Default Description
00h R/W General Control 7 Carrier Detect 0: No carrier detected.
1: Carrier detected.
6 Mute 0 Mute has precedence over
Bypass.
0: Normal operation.
1: Outputs muted.
5 Bypass 0 0: Normal operation.
1: Equalizer bypassed.
4:3 Sleep Mode 01 Sleep mode control. Sleep has
precedence over Mute and
Bypass.
00: Disable sleep mode (force
equalizer to stay enabled).
01: Sleep mode active when no
input signal detected.
10: Force equalizer into sleep
mode (powered down)
regardless of whether there is
an input signal or not.
11: Reserved.
2 Extended 3G Reach Mode 0 Extended 3G reach mode to
extend the cable length for 2.97
Gbps applications.
0: Normal operation.
1: Extended 3G reach mode.
1:0 Reserved 00 Reserved as 00. Always write
00 to these bits.
14 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: LMH0384