Datasheet

LMH0356
SNLS270K –AUGUST 2007–REVISED APRIL 2013 www.ti.com
PIN DESCRIPTIONS
WQFN-48 WQFN-40 Name Description
Pin Pin
1 1 SDI0 Data Input 0 True.
2 2 SDI0 Data Input 0 Complement.
4 4 SDI1 Data Input 1 True.
5 5 SDI1 Data Input 1 Complement.
7 6 SDI2 Data Input 2 True.
8 7 SDI2 Data Input 2 Complement.
9 8 ENABLE Device Enable. Powers down device when low. This pin has an internal pullup.
10 9 SDI3 Data Input 3 True.
11 10 SDI3 Data Input 3 Complement.
15 14 BYPASS/AUTO Bypass/Auto Bypass mode select. Bypasses reclocking when high. This pin has
BYPASS an internal pulldown.
16 15 OUTPUT MUTE Data and Clock Output Mute input. Mutes the output when low. This pin has an
internal pullup.
18 16 XTAL IN/EXT CLK Crystal or External Oscillator input.
22 19 XTAL OUT Crystal Oscillator output.
24 23 LOCK DETECT PLL Lock Detect output (active high).
28 24 SCO/SDO2 Serial Clock or Serial Data Output 2 Complement.
29 25 SCO/SDO2 Serial Clock or Serial Data Output 2 True.
32 27 SDO Data Output Complement.
33 28 SDO Data Output True.
36 31 SD/HD Data Rate Range output. Output is high for SD and low for HD or 3G.
37 32 SCO_EN Serial Clock or Serial Data 2 Output select. Sets second output to output the
clock when high and the data when low. This pin has an internal pulldown.
43 35 LF1 Loop Filter.
44 36 LF2 Loop Filter.
45 37 RATE0 Data Rate select input. This pin has an internal pulldown.
46 38 RATE1 Data Rate select input. This pin has an internal pulldown.
47 39 SEL0 Data Input select input. This pin has an internal pulldown.
48 40 SEL1 Data Input select input. This pin has an internal pulldown.
3, 6, 12, 14, 3, 11, 13, 26, V
CC
Positive power supply input.
30, 31, 34, 29, 30
35,
DAP, 13, 17, 12, 17, 18, V
EE
Negative power supply input.
19, 20, 21, 20, 33, 34
23, 25, 26,
27, 38, 39,
40, 41, 42
— 21, 22 NC No connect.
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