Datasheet

LMH0041, LMH0051
LMH0071, LMH0341
SNLS272Q –APRIL 2007–REVISED APRIL 2013 www.ti.com
Table 2. DES Register Detail Table (continued)
ADD 'h Name Bits Field R/W Default Description
05 GP Input If any of the GPIO pins are configured as inputs, then reading from this register provides the values on those
input pins
7:3 Reserved
2 r Input data on GPIO 2
1 r Input data on GPIO 1
0 r Input data on GPIO 0
06 GP Output If the GPIO ins are configured as General Purpose output pins, then writing to this register has the effect of
transferring the bits in this register to the output buffers of the GPIO pins.
7:3 Reserved
2 r/w Output data on GPIO 2
1 r/w Output data on GPIO 1
0 r/w Output data on GPIO 0
07–0C Reserved
0D DVB_ASI Idle_A When in DVB_ASI mode, idle characters are inserted into the datastream when there is no valid data to
transmit. This character is recognized by the receiver. The default character is K28.5 but if desired that can
be redefined via this register pair
7:0 r/w 83 Data [7:0]
0E DVB_ASI Idle_B DVB_ASI idle character MSBs
7:2 Reserved
1:0 r/w 2 Data[9:8]
0F–1C Reserved
1D Variant Reading from this register will return an 8 bit value which indicates which variant of the DES is being
addressed
7:6 Reserved r
5 Loop through r pin value This bit returns the state of the loop-through enable, and
enable defaults to the same as the state of the Loopthru_EN pin
4:3 mode r pin value Returns a two bit pattern which indicates the state that the
device is in
00,01,10: Standard Video Mode
11: DVB_ASI Mode
2 Reserved
1:0 Variant r returns the part type:
00: LMH0341
01: LMH0041/LMH0051
10:LMH0071
11:Reserved
1E-1F Reserved
20 Control 7:3 Reserved
2 Data Order r/w 0 Determines deserialization order —
0: Expects LSB to be received first
1:Expects MSB to be received first
1 Reset Channel r/w 0 Writing a '1' to this bit forces a reset of the channel
0 Digital r/w 0 Writing a '1' to this bit will shut down several of the digital
Powerdown processing sections of the product to save power.
21 DVB_ASI This register allows the device to be placed in DVB_ASI mode or standard operation mode
7:5 Reserved
4 RX_MUX_SEL r/w 0 If enabled by register 22, then this bit will override the
RX_MUX_SEL pin.
3:2 Reserved
1:0 DVB_ASI r/w 0 00,01,10: Standard Operation
11: DVB_ASI
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Product Folder Links: LMH0041 LMH0051 LMH0071 LMH0341