Datasheet

FPGA Host
LMH0051
+
-
+
-
+
-
+
-
+
-
+
-
RX4
RX3
RX2
RX1
RX0
RXCLK
SDA
SCK
SMB_CS
7.87 kÖ
30 nF
RSET
LF_REF
LF_CP
LVDS Inputs
LVCMOS GPIO
SMBus Interface
GPIO_0
GPIO_1
RX_MUX_SEL
V
DD2V5
V
DD3V3
3.3V2.5V
V
DDPLL
22 µF
3.3V
5 kÖ
GND
RSVD_H
1,15,18,36
7,25,35
5
DAP, 8, 9,10,
13, 23, 24, 29
3
4
6
12
14
26
27
28
34
33
32
38
37
40
39
42
41
44
43
46
45
48
47
GPIO_2
11
RXIN0+
RXIN0-
RXIN1+
RXIN1-
16
17
19
20
All Bypass
CAPS not
shown
3.3V
DVB_ASI
RESET
LOCK
30
31
DNC
2, 21, 22
100ÖTWP
100ÖTWP
3.3V
3.3V
LMH0041, LMH0051
LMH0071, LMH0341
SNLS272Q –APRIL 2007–REVISED APRIL 2013 www.ti.com
Figure 18. Typical CML Application Circuit (LMH0051)
22 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LMH0041 LMH0051 LMH0071 LMH0341