Datasheet
FPGA Host
LMH0341
+
-
+
-
+
-
+
-
+
-
+
-
RX4
RX3
RX2
RX1
RX0
RXCLK
SDA
SCK
SMB_CS
75Ö
75Ö
75Ö
75Ö
5.6 nH
SDI Loopthrough
Output
7.87 kÖ
30 nF
RSET
LF_REF
LF_CP
TXOUT+
TXOUT-
LVDS Inputs
LVCMOS GPIO
SMBus Interface
GPIO_0
GPIO_1
RX_MUX_SEL
V
DD2V5
V
DD3V3
3.3V2.5V
2.5V
4.7 µF
4.7 µF
V
DDPLL
22 µF
3.3V
5 kÖ
GND
RSVD_H
1,15,18,36
7,25,35
5
DAP, 8,9,10,
23,24,29
3
4
6
12
14
21
22
26
27
28
34
38
37
40
39
42
41
44
43
46
45
48
47
3.3V
5 kÖ
Loopthru_EN
2
GPIO_2
11
RXIN
0
+
RXIN
0
-
RXIN
1
+
RXIN
1
-
Reference Black
Signal
See LMH0344
Datasheet
For details
16
17
19
20
LMH0344
All Bypass
CAPS not
shown
3.3V
DVB_ASI
RESET
LOCK
30
31
DNC
13
33
32
3.3V
3.3V
LMH0041, LMH0051
LMH0071, LMH0341
www.ti.com
SNLS272Q –APRIL 2007–REVISED APRIL 2013
There are three supply connections (see bypass discussion in POWER SUPPLIES and also PIN
DESCRIPTIONS for recommendations). The two main supplies are the 3.3V rail and the 2.5V rail. There is also
a 3.3V connection for the PLL circuitry.
There are multiple Ground connections for the device. The main ground connection for the SER is through the
large center DAP pad. This must be connected to ground for proper device operation. In addition, multiple other
inputs are required to be connected to ground as show in Figure 17 and listed in PIN DESCRIPTIONS.
Figure 17. Typical SMPTE Application Circuit
Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Links: LMH0041 LMH0051 LMH0071 LMH0341