Datasheet
-40.00
-35.00
-30.00
-25.00
-20.00
-15.00
-10.00
-5.00
0.00
5.00
1.00E+031.00E+041.00E+05 1.00E+06 1.00E+07 1.00E+08
FREQUENCY
JITTER TRANSFER (dB)
P
f1
JITTER FREQUENCY
JITTER TRANSFER GAIN
P-3dB
-20 dB/decade
á
è
BW
0.1
1
10
100
1000
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
1.E+07
1.E+08
1.E+09
FREQUENCY
INJECTED JITTER LEVEL
SMPTE
Jitter Tolerance
Spec
LMH0341
Jitter Tolerance
LMH0041, LMH0051
LMH0071, LMH0341
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SNLS272Q –APRIL 2007–REVISED APRIL 2013
frequency λ is attenuated by 3dB, and any jitter at frequencies greater than λ is attenuated by more than this.
From a design standpoint, it means that you primarily only need to worry about the jitter at frequencies below λ.
The LMH0341 adjusts it's loop bandwidth dependent on datarate, so for the lower datarates, it has a lower loop
bandwidth.Figure 10 shows the jitter transfer curve of an LMH0341 with a 2.97 Gbps signal input, 0.5UI of input
jitter, and nominal power supplies and temperature.
Figure 8. Jitter Tolerance Curve
Figure 9. Jitter Transfer Curve Parameters Figure 10. Jitter Transfer Curve
SMBus INTERFACE
The configuration bus conforms to the System Management Bus (SMBus) 2.0 specification. SMBus 2.0 includes
multiple options. The optional ARP (Address Resolution Protocol) feature is not supported. The I/O rail is 3.3V
only and is not 5V tolerant. The use of the SMB_CS signal is recommended for applications with multi-drop
applications (multiple devices to a host).
The System Management Bus (SMBus) is a two wire interface designed for the communication between various
system component chips. By accessing the control functions of the circuit via the SMBus, pin count is kept to a
minimum while allowing a maximum amount of versatility. The SMBus has three pins to control it, there is an
SMBus CS pin which enables the SMBus interface for the device, a Clock and a Data line. In applications where
there might be several devices, the SDA and SCK pins can be bussed together and the individual devices to be
communicated with may be selected via the CS pin The SCL and SDA are both open drain and are pulled high
by external pullup resistors. The DES has several internal configuration registers which may be accessed via the
SMBus. These registers are listed in Table 2 .
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Product Folder Links: LMH0041 LMH0051 LMH0071 LMH0341