Datasheet

LMH0041, LMH0051
LMH0071, LMH0341
SNLS272Q –APRIL 2007–REVISED APRIL 2013 www.ti.com
FUNCTIONAL DESCRIPTION
DEVICE OPERATION
The DES is used in digital video signal origination equipment. It is intended to be operated in conjunction with an
FPGA host which processes data received by the SER, and converts the five bit output data to an appropriate
parallel video format — usually 10 or 20 bits wide. In most applications, the input data to the DES will be data
compliant with DVB ASI, SMPTE 259M-C, SMPTE 292M or SMPTE 424M, and the decoding will be done by the
IP provided by TI or similar IP to result in a decoded output. TI offers IP in source code format to perform the
appropriate decoding of the data, as well as evaluation platforms to assist in the development of target
applications. For more information please contact your local TI Sales Office/Distributor
POWER SUPPLIES
The DES has several power supply pins, at 2.5V as well as 3.3V. It is important that these pins all be connected,
and properly bypassed. Bypassing should consist of parallel 4.7μF and 0.1μF capacitors as a minimum, with a
0.1μF capacitor on each power pin. The device has a large contact in the center of the bottom of the package.
This contact must be connected to the system GND as it is the major ground connection for the device. A 22 μF
capacitor is required on the V
DDPLL
pin which is connected to the 3.3V rail
Discrete bypassing is ineffective above 30 MHz to 50 MHz in power plane-based distribution systems. Above this
frequency range, the intrinsic capacitance of the power-ground system can be used to provide additional RF
bypassing. To make the best use of this, make certain that there are PCB layers dedicated to the Power supplies
and to GND, and that they are placed next to each other to provide a distributed capacitance between power and
GND.
The DES will work best when powered from linear regulators. The output of linear regulators is generally cleaner
with less noise than switching regulators. Output filtering and power system frequency compensation are
generally simpler and more effective with linear regulators. Low dropout linear regulators are available which can
usually operate from lower input voltages such as logic power supplies, thereby reducing regulator power
dissipation. Cascading of low dropout regulators should not be done since this places the entire supply current
load of both load systems on the first regulator in the cascade and increases its loading and thermal output.
POWER UP
The 3.3V power supply should be brought up before the 2.5V supply. The timing of the supply sequencing is not
important. The device has a power on reset sequence which takes place once both power supplies are brought
up. This sequence will reset all register contents to their default values, and will place the PLLs into link
acquisition mode, attempting to lock on the RXIN
0
input.
RESET
There are three ways in which the device may be reset. There is an automatic reset which happens on power-up;
there is a reset pin, which when brought low will reset the device, with normal operation resuming when the pin is
driven high again. The third way to reset the device is a soft reset, implemented via a write to the reset register.
This reset will put all of the register values back to their default values, except it will not affect the address
register value if the SMBus default address has been changed.
LVDS OUTPUTS
The DES has LVDS outputs, compatible with ANSI/TIA/EIA-644. LVDS outputs expect to drive a 100Ω
transmission line which is properly terminated at the host FPGA inputs. It is recommended that the PCB trace
between the FPGA and the receiver be less than 25 cm. Longer PCB traces may introduce signal degradation as
well as channel skew which could cause serialization errors.
The LVDS outputs on the DES have a programmable output swing. The default condition is for the smaller size
swing, in order to save power. If a larger amplitude output swing is desired, this can be effected through the use
of register 0x27h
12 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LMH0041 LMH0051 LMH0071 LMH0341