Datasheet
SP
t
BUF
t
HD:STA
t
LOW
t
R
t
HD:DAT
t
HIGH
t
F
t
SU:DAT
ST
SP
t
SU:STO
SCL
SDA
ST
t
SU:STA
LMH0303
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SNLS285G –APRIL 2008–REVISED APRIL 2013
AC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
(1)
.
Symbol Parameter Conditions Reference Min Typ Max Units
DR
SDI
Input Data Rate SDI, SDI 2970 Mbps
t
jit
Additive Jitter 2.97 Gbps SDO, SDO 20 ps
P-P
1.485 Gbps 18 ps
P-P
270 Mbps 15 ps
P-P
t
r
,t
f
Output Rise Time, Fall Time SD/HD = 0, 20% – 80%, 90 130 ps
SD/HD = 1, 20% – 80% 400 800 ps
Mismatch in Rise/Fall Time SD/HD = 0 30 ps
SD/HD = 1 50 ps
Duty Cycle Distortion SD/HD = 0, 2.97 Gbps
(2)
27 ps
SD/HD = 0, 1.485 Gbps
(2)
30 ps
SD/HD = 1
(2)
100 ps
t
OS
Output Overshoot SD/HD = 0
(2)
10 %
SD/HD = 1
(2)
8 %
RL
SDO
Output Return Loss 5 MHz - 1.5 GHz
(3)
15 dB
1.5 GHz - 3.0 GHz
(3)
10 dB
SMBus AC Specifications
f
SMB
Bus Operating Frequency 10 100 kHz
t
BUF
Bus free time between Stop
4.7 µs
and Start Condition
t
HD:STA
Hold time after (repeated) Start At I
SPULLUP
= MAX
Condition. After this period, the 4.0 µs
first clock is generated.
t
SU:STA
Repeated Start Condition setup
4.7 µs
time
t
SU:STO
Stop Condition setup time 4.0 µs
t
HD:DAT
Data hold time 300 ns
t
SU:DAT
Data setup time 250 ns
t
LOW
Clock low period 4.7 µs
t
HIGH
Clock high period 4.0 50 µs
t
F
Clock/Data Fall Time 300 ns
t
R
Clock/Data Rise Time 1000 ns
t
POR
Time in which device must be
500 ms
operational after power on
(1) Typical values are stated for V
CC
= +3.3V and T
A
= +25°C.
(2) Specification is ensured by characterization.
(3) Output return loss is dependent on board design. The LMH0303 meets this specification on the SD303 evaluation board.
TIMING DIAGRAM
Figure 2. SMBus Timing Parameters
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