Datasheet

LMH0303

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SNLS285G –APRIL 2008–REVISED APRIL 2013

Table 1. SMBus Registers (continued)

Address R/W Name Bits Field Default Description

03h R/W DIRECTION 7 HDTFThreshLSB 1 Least Significant Bit for HDTFThresh

detection threshold. Combines with

HDTFThresh bits in register 04h.

6 SDTFThreshLSB 1 Least Significant Bit for SDTFThresh

detection threshold. Combines with

SDTFThresh bits in register 05h.

5:3 RSVD 000 Reserved as 000. Always write 000 to these

bits.

2 DTFN 0 Direction of TFN that affects FAULT pin (when

not masked).

0: TFN=1 will cause FAULT to be 0 (when the

condition is not masked off).

1: TFN=0 will cause FAULT to be 0 (when the

condition is not masked off).

1 DTFP 0 Direction of TFP that affects FAULT pin (when

not masked).

0: TFP=1 will cause FAULT to be 0 (when the

condition is not masked off).

1: TFP=0 will cause FAULT to be 0 (when the

condition is not masked off).

0 DLOS 0 Direction of LOS that affects FAULT pin

(when not masked).

0: LOS=0 will cause FAULT to be 0 (when the

condition is not masked off).

1: LOS=1 will cause FAULT to be 0 (when the

condition is not masked off).

04h R/W OUTPUT 7:5 HDTFThresh 100 Sets the Termination Fault threshold for SDO,

when SD is set to HD rates (0). Combines

with HDTFThreshLSB in register 03h (default

for combined value is 1001).

4:0 AMP 10000 SDO output amplitude in roughly 5 mV steps.

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