Datasheet

600
650
700
750
800
850
900
950
1000
6 7 8 9 10 11
RSET (k:)
VOUT (mV)
-60
-50
-40
-30
-20
-10
0
1.00E+07 1.00E+08 1.00E+09 1.00E+10
FREQUENCY
RETURN LOSS (dB)
SMPTE424 Limit
Measured EVK
Return Loss
LMH0040, LMH0050
LMH0070, LMH0340
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SNLS271I APRIL 2007REVISED APRIL 2013
Figure 6. Simplified SDI Output Circuit
Care must be taken in the layout of the output circuitry to meet SMPTE return loss specifications as any parasitic
impedances or transmission line discontinuities will result in reflections which will adversely affect the output
return loss. For more details on how to get good output return loss, please refer to the application note
Successful design with the FPGA-Attach SER/DES”.
Figure 7. SDI Output Return Loss (EVK Example)
The amplitude of the output is ensured to be compliant with SMPTE specifications if the specified value of R
SET
resistor is used, however if the designer wishes to change the output amplitude, there are two methods by which
this can be done. By changing the value of resistor connected to the R
SET
pin, the output amplitude will be
adjusted.
Figure 8. Output Voltage vs. R
SET
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Product Folder Links: LMH0040 LMH0050 LMH0070 LMH0340