Datasheet

LMH0030
SNLS219G –JANUARY 2006–REVISED APRIL 2013 www.ti.com
DC ELECTRICAL CHARACTERISTICS
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
(1)(2)
.
Symbol Parameter Conditions Reference Min Typ Max Units
V
IH
Input Voltage High Level All LVCMOS 2.0 V
DDIO
V
Inputs
V
IL
Input Voltage Low Level V
SSIO
0.8 V
I
IH
Input Current High Level V
IH
= V
DDIO
+90 +150 µA
I
IL
Input Current Low Level V
IL
= V
SSIO
−1 −20 µA
V
OH
CMOS Output Voltage High I
OH
= −6.6 mA All LVCMOS
2.4 2.7 V
DDIO
V
Level Outputs
V
OL
CMOS Output Voltage Low I
OL
= +6.6 mA V
SSIO
V
SSIO
V
SSIO
V
Level +0.3 +0.5V
V
SDO
Serial Driver Output Voltage Test Circuit, Test Loads SDO, SDO
720 800 880 mV
P-P
Shall Apply
I
DD
(3.3V) Power Supply Current, 3.3V V
CLK
= 27 MHz, NTSC color V
DDIO
, V
DDSD
Supply, Total Bar Pattern, Test Circuit, 48 65 mA
Test Loads Shall Apply
I
DD
(3.3V) Power Supply Current, 3.3V V
CLK
= 74.25 MHz, NTSC V
DDIO
, V
DDSD
Supply, Total color Bar Pattern, Test
66 90 mA
Circuit, Test Loads Shall
Apply
I
DD
(2.5V) Power Supply Current, 2.5V V
CLK
= 27 MHz, NTSC color V
DDD
, V
DDZ
,
Supply, Total Bar Pattern, Test Circuit, V
DDPLL
66 85 mA
Test Loads Shall Apply
I
DD
(2.5V) Power Supply Current, 2.5V V
CLK
= 74.25 MHz, NTSC V
DDD
, V
DDZ
,
Supply, Total color Bar Pattern, Test V
DDPLL
85 110 mA
Circuit, Test Loads Shall
Apply
(1) Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are referenced to
V
SS
= 0V.
(2) Typical values are stated for V
DDIO
= V
DDSD
= +3.3V, V
DDD
= V
DDPLL
= +2.5V and T
A
= +25°C.
AC ELECTRICAL CHARACTERISTICS
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
(1)
.
Symbol Parameter Conditions Reference Min Typ Max Units
f
VCLK
Parallel Video Clock V
CLK
27 74.25 MHz
Frequency
DC
V
Video Clock Duty Cycle V
CLK
45 50 55 %
f
ACLK
Ancillary Clock Frequency A
CLK
V
CLK
MHz
DC
A
Ancillary Clock Duty A
CLK
45 50 55 %
Cycle
t
r
, t
f
Input Clock and Data Rise 10%–90% V
CLK
, A
CLK
, DV
N
,
1.0 1.5 3.0 ns
Time, Fall Time AD
N
BR
SDO
Serial Data Rate
(2)(3)
SDO, SDO 270 1,485 M
bps
t
r
, t
f
Rise Time, Fall Time 20%–80%,
(3)
SDO, SDO 270 ps
t
r
, t
f
Rise Time, Fall Time 20%–80%,
(2)
SDO, SDO 500 ps
Output Overshoot
(4)
SDO, SDO 5 %
(1) Typical values are stated for V
DDIO
= V
DDSD
= +3.3V, V
DDD
= V
DDPLL
= +2.5V and T
A
= +25°C.
(2) R
L
= 75Ω, AC-coupled @ 270 M
bps
, R
REF
LVL = R
REF
PRE = 4.75 kΩ 1%, See Test Loads and Test Circuit.
(3) R
L
= 75Ω, AC-coupled @ 1,485 M
bps
, R
REF
LVL = R
REF
PRE = 4.75 kΩ 1%, See Test Loads and Test Circuit.
(4) Specification is ensured by design.
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